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MC100ES6111D Datenblatt(PDF) 7 Page - Motorola, Inc

Teilenummer MC100ES6111D
Bauteilbeschribung  LOW VOLTAGE 2.5/3.3V DIFFIERENTIAL ECL / PECL/ HSTL FANOUT BUFFER
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Hersteller  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

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MC100ES6111
TIMING SOLUTIONS
7
MOTOROLA
APPLICATIONS INFORMATION
Understanding the junction temperature range of the
MC100ES6111
To make the optimum use of high clock frequency and low
skew capabilities of the MC100ES6111, the MC100ES6111 is
specified, characterized and tested for the junction
temperature range of TJ=0°C to +110°C. Because the exact
thermal performance depends on the PCB type, design,
thermal management and natural or forced air convection,
the junction temperature provides an exact way to correlate
the application specific conditions to the published
performance data of this datasheet. The correlation of the
junction temperature range to the application ambient
temperature range and vice versa can be done by
calculation:
TJ = TA + Rthja ⋅ Ptot
Assuming a thermal resistance (junction to ambient) of
54.4
°C/W (2s2p board, 200 ft/min airflow, see table 4) and a
typical power consumption of 610 mW (all outputs terminated
50 ohms to VTT, VCC=3.3V, frequency independent), the
junction temperature of the MC100ES6111 is approximately
TA + 33 °C, and the minimum ambient temperature in this
example case calculates to -33
°C (the maximum ambient
temperature is 77
°C. See Table 8). Exceeding the minimum
junction temperature specification of the MC100ES6111
does not have a significant impact on the device functionality.
However, the continuous use the MC100ES6111 at high
ambient temperatures requires thermal management to not
exceed the specified maximum junction temperature. Please
see the application note AN1545 for a power consumption
calculation guideline.
Table 8: Ambient temperature ranges (Ptot = 610 mW)
Rthja (2s2p board)
TA, mina
TA, max
Natural convection
59.0
°C/W
-36
°C
74
°C
100 ft/min
54.4
°C/W
-33
°C
77
°C
200 ft/min
52.5
°C/W
-32
°C
78
°C
400 ft/min
50.4
°C/W
-30
°C
79
°C
800 ft/min
47.8
°C/W
-29
°C
81
°C
a. The MC100ES6111 device function is guaranteed from TA=-40 °C
to TJ=110 °C
Maintaining Lowest Device Skew
The MC100ES6111 guarantees low output-to-output bank
skew of 35 ps and a part-to-part skew of max. 250 ps. To
ensure low skew clock signals in the application, both outputs
of any differential output pair need to be terminated
identically, even if only one output is used. When fewer than
all nine output pairs are used, identical termination of all
output pairs within the output bank is recommended. If an
entire output bank is not used, it is recommended to leave all
of these outputs open and unterminated. This will reduce the
device power consumption while maintaining minimum
output skew.
Power Supply Bypassing
The MC100ES6111 is a mixed analog/digital product. The
differential architecture of the MC100ES6111 supports low
noise signal operation at high frequencies. In order to
maintain its superior signal quality, all VCC pins should be
bypassed by high-frequency ceramic capacitors connected
to GND.
If the spectral frequencies of the internally
generated switching noise on the supply pins cross the series
resonant point of an individual bypass capacitor, its overall
impedance begins to look inductive and thus increases with
increasing frequency. The parallel capacitor combination
shown ensures that a low impedance path to ground exists
for frequencies well above the noise bandwidth.
Figure 2. VCC Power Supply Bypass
VCC
MC100ES6111
VCC
33...100 nF
0.1 nF


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