Datenblatt-Suchmaschine für elektronische Bauteile |
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74V2G07STR Datenblatt(PDF) 1 Page - STMicroelectronics |
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74V2G07STR Datenblatt(HTML) 1 Page - STMicroelectronics |
1 / 9 page 1/9 November 2001 s HIGH SPEED: tPD =3.7ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUT s OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2G07 is an advanced high-speed CMOS TRIPLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V. 74V2G07 TRIPLE BUFFER (OPEN DRAIN) This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-8L 74V2G07STR SOT323-8L 74V2G07CTR SOT323-8L SOT23-8L PRELIMINARY DATA |
Ähnliche Teilenummer - 74V2G07STR |
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Ähnliche Beschreibung - 74V2G07STR |
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