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74AHCT3G14GM Datenblatt(PDF) 2 Page - NXP Semiconductors |
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74AHCT3G14GM Datenblatt(HTML) 2 Page - NXP Semiconductors |
2 / 21 page 2004 Oct 18 2 Philips Semiconductors Product specification Inverting Schmitt trigger 74AHC3G14; 74AHCT3G14 FEATURES • Symmetrical output impedance • High noise immunity • ESD protection: – HBM EIA/JESD22-A114-B exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V – CDM EIA/JESD22-C101 exceeds 500 V. • Low power dissipation • Balanced propagation delays • Multiple package options • Specified from −40 °C to +85 °C and −40 °C to +125 °C. APPLICATIONS • Wave and pulse shapers • Astable multivibrators • Monostable multivibrators. DESCRIPTION The 74AHC3G/AHCT3G14 is a high-speed Si-gate CMOS device. The 74AHC3G/AHCT3G14 provides three inverting buffers with Schmitt-trigger action. These devices are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. QUICK REFERENCE DATA GND = 0 V; Tamb =25 °C; tr =tf ≤ 3.0 ns. Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. FUNCTION TABLE See note 1. Note 1. H = HIGH voltage level; L = LOW voltage level. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT AHC3G14 AHCT3G14 tPHL/tPLH propagation delay A to Y CL = 15 pF; VCC = 5 V 3.2 4.1 ns CI input capacitance 1.5 1.5 pF CPD power dissipation capacitance CL = 15 pF; f = 1 MHz; notes 1 and 2 10 12 pF INPUT OUTPUT nA nY LH HL |
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