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ACT4911QW Datenblatt(PDF) 27 Page - Active-Semi, Inc

Teilenummer ACT4911QW
Bauteilbeschribung  Power Loss Protection with 6A eFuse
Download  33 Pages
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Hersteller  ACTIVE-SEMI [Active-Semi, Inc]
Direct Link  http://www.active-semi.com
Logo ACTIVE-SEMI - Active-Semi, Inc

ACT4911QW Datenblatt(HTML) 27 Page - Active-Semi, Inc

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ACT4911QW
Rev 1.0, 15-Sept-2017
Innovative PowerTM
www.active-semi.com
ActiveSwitcherTM is a trademark of Active-Semi
Copyright © 2017 Active-Semi, Inc.
27
PC board layout guidance
Proper parts placement and PCB layout are critical to
the operation of switching power supplies. Follow the
following layout guidelines when designing the
ACT4911 PCB. Refer to the Active-Semi ACT4911
Evaluation Kits for layout examples
1. Place the buck input capacitors as close as
possible to the IC. Connect the input capacitors
directly between STR and PGND pins on the
top layer. Routing these traces on the top layer
eliminates the need for vias.
2. Minimize the switch node trace length between
the SW pin and the inductor. Optimal switch
node routing is to run the trace between the in-
put capacitor’s pads. Using 1206 or larger sized
input capacitors is recommended. Avoid routing
sensitive analog signals near these high fre-
quency, high dV/dt traces.
3. The Buck output capacitors should be placed
by the inductor and connected directly to the in-
ductor and ground plane with short and wide
traces. The output capacitor ground should
make a short connection to the input capacitor
ground. If required, use multiple vias.
4. The FB pin should be Kelvin connected to the
output capacitor through the shortest possible
route, while keeping sufficient distance from
switching node to prevent noise injection. The
IC regulates the output voltage to this Kelvin
connection.
5. Connect the PGND and VSS ground pins must
be electrically connected together. The VSS
ground plane should be isolated from the rest
of the PCB power ground.
6. Remember that all open drain outputs need
pull-up resistors.
7. Connect the exposed pad directly to the top
layer ground plane. Connect the top layer
ground plane to both internal ground planes
and the PCB backside ground plane with ther-
mal vias. Provide ground plane routing on mul-
tiple layers to allow the IC’s heat to flow into the
PCB and then spread radially from the IC. Avoid
cutting the ground planes or adding vias that re-
strict the radial flow of heat.


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