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TL16C2550

SLWS161 – JUNE 2005

2.5-V to 5-V DUAL UART WITH 16-BYTE FIFOS

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Internal Diagnostic Capabilities:

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Programmable Auto-RTS and Auto-CTS

– Loopback Controls for Communications

Link Fault Isolation

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In Auto-CTS Mode, CTS Controls Transmitter

– Break, Parity, Overrun, and Framing Error

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In Auto-RTS Mode, RCV FIFO Contents and

Simulation

Threshold Control RTS

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Fully Prioritized Interrupt System Controls

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Serial and Modem Control Outputs Drive a

RJ11 Cable Directly When Equipment Is on

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Modem Control Functions (CTS, RTS, DSR,

the Same Power Drop

DTR, RI, and DCD)

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Capable of Running With All Existing

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Available in 48-Pin TQFP (PFB), 44-Pin PLCC

TL16C450 Software

(FN), or 32-Pin QFN (RHB) Packages

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After Reset, All Registers Are Identical to the

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Pin Compatible with TL16C752B (48-Pin

TL16C450 Register Set

Package)

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Up to 24-MHz Clock Rate for up to 1.5-Mbaud

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Point-of-Sale Terminals

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Up to 20-MHz Clock Rate for up to 1.25-Mbaud

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Gaming Terminals

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Portable Applications

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Up to 16-MHz Clock Rate for up to 1-Mbaud

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Router Control

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Cellular Data

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In the TL16C450 Mode, Hold and Shift

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Factory Automation

Registers Eliminate the Need for Precise

Synchronization Between the CPU and Serial

Data

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Programmable Baud Rate Generator Allows

The TL16C2550 is a dual universal asynchronous

Division of Any Input Reference Clock by 1 to

receiver and transmitter (UART). It incorporates the

functionality of two TL16C550D UARTs, each UART

having its own register set and FIFOs. The two

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Standard Asynchronous Communication Bits

UARTs share only the data bus interface and clock

(Start, Stop, and Parity) Added to or Deleted

source,

otherwise

they

operate

independently.

From the Serial Data Stream

Another name for the uart function is Asynchronous

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5-V, 3.3-V, and 2.5-V Operation

Communications Element (ACE), and these terms will

be used interchangeably. The bulk of this document

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Independent Receiver Clock Input

will describe the behavior of each ACE, with the

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Transmit, Receive, Line Status, and Data Set

understanding that two such devices are incorporated

Interrupts Independently Controlled

into the TL16C2550.

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Fully Programmable Serial Interface

Characteristics:

– 5-, 6-, 7-, or 8-Bit Characters

– Even-, Odd-, or No-Parity Bit Generation and

Detection

– 1-, 1 1/2-, or 2-Stop Bit Generation

– Baud Generation (dc to 1 Mbit/s)

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False-Start Bit Detection

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Complete Status Reporting Capabilities

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3-State Output TTL Drive Capabilities for

Bidirectional Data Bus and Control Bus

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Line Break Generation and Detection

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCT PREVIEW information concerns products in the forma-

Copyright © 2005, Texas Instruments Incorporated

tive or design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the

right to change or discontinue these products without notice.