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GD5F2GQ4RFZIS Datenblatt(PDF) 36 Page - GigaDevice Semiconductor (Beijing) Inc.

Teilenummer GD5F2GQ4RFZIS
Bauteilbeschribung  SPI(x1/x2/x4) NAND Flash
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Hersteller  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Direct Link  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

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SPI(x1/x2/x4) NAND Flash
2G
36
12 ERASE OPERATIONS
12.1 Block Erase (D8H)
Figure12-1. Block Erase Sequence Diagram
Command
0
1
2
3
4
5
6
7
D8H
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
CS#
get feature
0
1
2
3
4
5
6
7
0FH
CS#
SLK
SI
SO
High-Z
8
9 10 11 12 13 14 15
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
MSB
Status register address
Status register data out
MSB
SCLK
SI
SO
tCS
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
7
6
5
4
3
2
1
0
Status register data out
7
6
MSB
The BLOCK ERASE (D8H) command is used to erase at the block level. The blocks are organized as 64 pages per
block, 2176 bytes per page (2048 + 128 bytes). Each block is136 Kbytes. The BLOCK ERASE command (D8H) operates
on one block at a time. The command sequence for the BLOCK ERASE operation is as follows:
• 06H (WRITE ENBALE command)
• D8H (BLOCK ERASE command)
• 0FH (GET FEATURES command to read the status register)
Prior to performing the BLOCK ERASE operation, a WRITE ENABLE (06H) command must be issued. As with any
command that changes the memory contents, the WRITEENABLE command must be executed in order to set the WEL
bit. If the WRITE ENABLE command is not issued, then the rest of the erase sequence is ignored. A WRITE ENABLE
command must be followed by a BLOCK ERASE (D8H) command. This command requires a 24-bit address. After the
row address is registered, the control logic automatically controls timing and erase-verify operations. The device is busy
for tERS time during the BLOCK ERASE operation. The GET FEATURES (0FH) command can be used to monitor the
status of the operation.
When
a
block
erase
operation
is
in
progress,
user
can
issue
normal
read
from
cache
commands
(03H/0BH/3BH/6BH/BBH/EBH) to read the data in the cache.


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