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GD9FU1G8F2AMG Datenblatt(PDF) 37 Page - GigaDevice Semiconductor (Beijing) Inc.

Teilenummer GD9FU1G8F2AMG
Bauteilbeschribung  Single level cell technology
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Hersteller  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Direct Link  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD9FU1G8F2AMG Datenblatt(HTML) 37 Page - GigaDevice Semiconductor (Beijing) Inc.

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GD9Fx1GxF2A
37
Parameter page CRC value table
Device Model
ORGANIZATION
VCC RANGE
CRC value
B254/B255
“GD9FS1G8F2A”
128M x 8bit
1.7v ~ 1.95v
D0H/DBH
“GD9FS1G6F2A”
64M x 16bit
1.7v ~ 1.95v
F8H/18H
“GD9FU1G8F2A“
128M x 8bit
2.7v ~ 3.6v
88H/D5H
“GD9FU1G6F2A“
64M x 16bit
2.7v ~ 3.6v
A0H/16H
8.6 Read Status (70H)
The device contains a Status Register which may be read to find out whether an operation is completed and whether the
program or erase operation is completed successfully. After writing 70H command to the command register, a read cycle
outputs the content of the Status Register to the I/O pins on the falling edge of CE# or RE#, whichever occurs last. This
allows the system to poll the progress of each device in multiple memory connections even when R/B# pins are common-
wired. RE# or CE# does not need to be toggled for updated status. The command register remains in Status Read mode
until further commands are issued to it. Therefore, if the status register is read during a random read cycle, the read
command (00h) should be given before starting read cycles.
70h
CLE
CE#
WE#
RE#
Status
IO0-7
tDS
tDH
tCHZ
tCOH
tRHZ
tRHOH
tCLR
tCS
tCH
tCEA
tWP
tWHR
tCLR
tCLS
tREA
tIR
Figure 28: Read Status figures


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