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GD25B16C Datenblatt(PDF) 35 Page - GigaDevice Semiconductor (Beijing) Inc.

Teilenummer GD25B16C
Bauteilbeschribung  3.3V Uniform Sector Dual and Quad Serial Flash
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Hersteller  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Direct Link  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25B16C Datenblatt(HTML) 35 Page - GigaDevice Semiconductor (Beijing) Inc.

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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25B16C
35
Address
A23-A16
A15-A10
A9-A0
Security Registers
00000000
000000
Don’t Care
Figure 32. Erase Security Registers command Sequence Diagram
7.29.
Program Security Registers (42H)
The Program Security Registers command is similar to the Page Program command. It allows from 1 to 256 bytes
Security Registers data to be programmed. A Write Enable (WREN) command must previously have been executed to set
the Write Enable Latch (WEL) bit before sending the Program Security Registers command. The Program Security Registers
command is entered by driving CS# Low, followed by the command code (42H), three address bytes and at least one data
byte on SI. As soon as CS# is driven high, the self-timed Program Security Registers cycle (whose duration is tPP) is initiated.
While the Program Security Registers cycle is in progress, the Status Register may be read to check the value of the Write
In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed Program Security Registers cycle, and is 0
when it is completed. At some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.
If the Security Registers Lock Bit (LB) is set to 1, the Security Registers will be permanently locked. Program Security
Registers command will be ignored.
Address
A23-A16
A15-A8
A7-A0
Security Registers 0
00H
00H
Byte Address
Security Registers 1
00H
01H
Byte Address
Security Registers 2
00H
02H
Byte Address
Security Registers 3
00H
03H
Byte Address
Figure 33. Program Security Registers command Sequence Diagram
Command
0
1
2
3
4
5
6
7
44H
CS#
SCLK
SI
8
9
29 30 31
MSB
2
1
0
24 Bits Address
23 22
Command
0
1
2
3
4
5
6
7
42H
CS#
SCLK
SI
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
42 43 44 45
41
46 47
40
50 51 52 53
49
54 55
48
6
5
4
3
2
1
0
7
CS#
SCLK
SI
MSB
Data Byte 2
32 33 34 35
7
6
5
4
3
2
1
0
MSB
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
Data Byte 1
Data Byte 3
Data Byte 256
MSB
MSB
MSB
36 37 38 39


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