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MC100LVEL05 Datenblatt(PDF) 1 Page - ON Semiconductor |
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MC100LVEL05 Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 3 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3–1 REV 0 © Motorola, Inc. 1997 1/97 2Input Differential AND/NAND The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3V supply voltage. With propagation delays and output transition times equivalent to the EL05, the LVEL05 is ideally suited for those applications which require the ultimate in AC performance at low voltage power supplies. Because a negative 2-input NAND is equivalent to a 2-input OR function, the differential inputs and outputs of the device allows the LVEL05 to also be used as a 2-input differential OR/NOR gate. • 340ps Propagation Delay • High Bandwidth Output Transitions • 75kΩ Internal Input Pulldown Resistors • >2000V ESD Protection 1 2 3 45 6 7 8 D0 D0 D1 D1 VEE Q Q VCC LOGIC DIAGRAM AND PINOUT ASSIGNMENT MC100LVEL05 PIN FUNCTION D0, D1 Data Inputs Q Data Outputs PIN DESCRIPTION D SUFFIX 8–LEAD PLASTIC SOIC PACKAGE CASE 751-05 |
Ähnliche Teilenummer - MC100LVEL05 |
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Ähnliche Beschreibung - MC100LVEL05 |
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