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MC10H604FNR2 Datenblatt(PDF) 1 Page - ON Semiconductor |
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MC10H604FNR2 Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 4 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2–302 REV 1 © Motorola, Inc. 1996 9/96 Registered Hex TTL/ECL Translator The MC10H/100H604 is a 6–bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock input. The asynchronous master reset control is an ECL level input.. With its differential ECL outputs and TTL inputs the H604 device is ideally suited for the transmit function of a HPPI bus type board–to–board interface application. The on chip registers simplify the task of synchronizing the data between the two boards. The device is available in either ECL standard: the 10H device is compatible with MECL 10KH logic levels while the 100H device is compatible with 100K logic levels. • Differential 50Ω ECL Outputs • Choice Between Differential ECL or TTL Clock Input • Dual Power Supply • Multiple Power and Ground Pins to Minimize Noise • Specified Within–Device Skew * Dn Qn Qn MR TCLK CLK CLK VBB 1 OF 6 BITS D CLK R Q LOGIC SYMBOL * 1. When using MECL inputs, TCLK must be tied to ground (0V). 2. When using only one MECL input, the unused MECL input must be tied to VBB, and TCLK must be tied to ground (0V). 3. When using TCLK, both MECL inputs must be tied to VEE (–5.2V). MC10H604 MC100H604 Pinout: 28–Lead PLCC (Top View) PIN NAMES PIN FUNCTION D0–D5 CLK, CLK TCLK MR Q0–Q5 Q0–Q5 VCCE VCCT VEE TTL Data Inputs Differential ECL Clock Input TTL Clock Input ECL Master Reset Input True ECL Outputs Inverted ECL Outputs ECL VCC (0V) TTL VCC (+5.0V) ECL VEE (–5.2V) D0 56 78 9 10 11 25 24 23 22 21 20 19 TCLK VBB CLK CLK MR VCCE Q4 Q5 Q5 Q4 VCCE Q3 Q3 26 27 28 2 3 4 18 17 16 14 13 12 15 D1 D2 VCCT D3 D4 D5 VCCE Q0 Q0 VEE Q1 Q1 Q2 Q2 FN SUFFIX PLASTIC PACKAGE CASE 776–02 Dn L H X TRUTH TABLE MR L L H TCLK/CLK Z Z X Qn+1 L H L Z = LOW to HIGH Transition |
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