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MC14538BDTR2 Datenblatt(PDF) 1 Page - ON Semiconductor |
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MC14538BDTR2 Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 12 page © Semiconductor Components Industries, LLC, 2000 March, 2000 – Rev. 3 1 Publication Order Number: MC14538B/D MC14538B Dual Precision Retriggerable/Resettable Monostable Multivibrator The MC14538B is a dual, retriggerable, resettable monostable multivibrator. It may be triggered from either edge of an input pulse, and produces an accurate output pulse over a wide range of widths, the duration and accuracy of which are determined by the external timing components, CX and RX. Output Pulse Width = (Cx) (Rx) where: Rx is in k W Cx is in mF • Unlimited Rise and Fall Time Allowed on the A Trigger Input • Pulse Width Range = 10 µs to 10 s • Latched Trigger Inputs • Separate Latched Reset Inputs • 3.0 Vdc to 18 Vdc Operational Limits • Triggerable from Positive (A Input) or Negative–Going Edge (B–Input) • Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range • Pin–for–pin Compatible with MC14528B and CD4528B (CD4098) • Use the MC54/74HC4538A for Pulse Widths Less Than 10 µs with Supplies Up to 6 V. MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) Symbol Parameter Value Unit VDD DC Supply Voltage Range – 0.5 to +18.0 V Vin, Vout Input or Output Voltage Range (DC or Transient) – 0.5 to VDD + 0.5 V Iin, Iout Input or Output Current (DC or Transient) per Pin ±10 mA PD Power Dissipation, per Package (Note 3.) 500 mW TA Operating Temperature Range – 55 to +125 °C Tstg Storage Temperature Range – 65 to +150 °C TL Lead Temperature (8–Second Soldering) 260 °C 2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. http://onsemi.com A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week Device Package Shipping ORDERING INFORMATION MC14538BCP PDIP–16 2000/Box MC14538BD SOIC–16 48/Rail MARKING DIAGRAMS 1 16 PDIP–16 P SUFFIX CASE 648 MC14538BCP AWLYYWW MC14538BDR2 SOIC–16 2500/Tape & Reel SOIC–16 DW SUFFIX CASE 751G 1 16 14538B AWLYYWW 1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative. SOEIAJ–16 F SUFFIX CASE 966 1 16 MC14538B AWLYWW MC14538BDT TSSOP–16 96/Rail SOIC–16 D SUFFIX CASE 751B 1 16 14538B AWLYWW TSSOP–16 DT SUFFIX CASE 948F 14 538B ALYW 1 16 MC14538BDTR2 TSSOP–16 2500/Tape & Reel MC14538BDW SOIC–16 47/Rail MC14538BDWR2 SOIC–16 1000/Tape & Reel MC14538BF SOEIAJ–16 See Note 1. MC14538BFEL SOEIAJ–16 See Note 1. |
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