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MC33025P Datenblatt(PDF) 9 Page - ON Semiconductor

Teilenummer MC33025P
Bauteilbeschribung  High Speed Double-Ended PWM Controller
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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MC34025 MC33025
9
MOTOROLA ANALOG IC DEVICE DATA
Undervoltage Lockout
There are two undervoltage lockout circuits within the IC.
The first senses VCC and the second Vref. During power–up,
VCC must exceed 9.2 V and Vref must exceed 4.2 V before
the outputs can be enabled and the Soft–Start latch released.
If VCC falls below 8.4 V or Vref falls below 3.6 V, the outputs
are disabled and the Soft–Start latch is activated. When the
UVLO is active, the part is in a low current standby mode
allowing the IC to have an off–line bootstrap start–up circuit.
Typical start–up current is 500
µA.
Output
The MC34025 has two high current totem pole outputs
specifically designed for direct drive of power MOSFETs.
They are capable of up to
±2.0 A peak drive current with a
typical rise and fall time of 30 ns driving a 1.0 nF load.
Separate pins for VC and Power Ground are provided.
With proper implementation, a significant reduction of
switching transient noise imposed on the control circuitry is
possible. The separate VC supply input also allows the
designer added flexibility in tailoring the drive voltage
independent of VCC.
Reference
A 5.1 V bandgap reference is pinned out and is trimmed to
an initial accuracy of
±1.0% at 25°C. This reference has short
circuit protection and can source in excess of 10 mA for
powering additional control system circuitry.
Design Considerations
Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards. With high
frequency, high power, switching power supplies it is
imperative to have separate current loops for the signal paths
and for the power paths. The printed circuit layout should
contain a ground plane with low current signal and high
current switch and output grounds returning on separate
paths back to the input filter capacitor. All bypass capacitors
and snubbers should be connected as close as possible to
the specific part in question. The PC board lead lengths must
be less than 0.5 inches for effective bypassing or snubbing.
Instabilities
In current mode control, an instability can be encountered
at any given duty cycle. The instability is caused by the
current feedback loop. It has been shown that the instability is
caused by a double pole at half the switching frequency. If an
external ramp (Se) is added to the on–time ramp (Sn) of the
current–sense waveform, stability can be achieved (see
Figure 20).
One must be careful not to add too much ramp
compensation. If too much is added, the system will start to
perform like a voltage mode regulator. All benefits of current
mode control will be lost. Figures 28A and 28B show
examples of two different ways in which external ramp
compensation can be implemented.
1.25 V
+
+
Ramp Input
Current Signal
Sn
Ramp Compensation
Se
Figure 20. Ramp Compensation
A simple equation can be used to calculate the amount of
external ramp necessary to add that will achieve stability in
the current loop. For the following equations, the calculated
values for the application circuit in Figure 36 are also shown.
Se
+
VO
L
NS
NP
(RS)Ai
where:
= DC output voltage
= number of power transformer primary
= or secondary turns
= gain of the current sense network
= (see Figures 25, 26 and 27)
= output inductor
= current sense resistance
VO
NP, NS
Ai
L
RS
+ 0.115 V µs
For the application circuit: Se +
5
1.8
µ
4
16
(0.3)(0.55)


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