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MSP430F479 Datenblatt(PDF) 44 Page - Texas Instruments |
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MSP430F479 Datenblatt(HTML) 44 Page - Texas Instruments |
44 / 95 page General-PurposeRegister ProgramCounter StackPointer StatusRegister ConstantGenerator General-PurposeRegister General-PurposeRegister General-PurposeRegister PC/R0 SP/R1 SR/CG1/R2 CG2/R3 R4 R5 R12 R13 General-PurposeRegister General-PurposeRegister R6 R7 General-PurposeRegister General-PurposeRegister R8 R9 General-PurposeRegister General-PurposeRegister R10 R11 General-PurposeRegister General-PurposeRegister R14 R15 44 MSP430F479, MSP430F478, MSP430F477 SLAS629B – MARCH 2009 – REVISED MAY 2020 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430F479 MSP430F478 MSP430F477 Detailed Description Copyright © 2009–2020, Texas Instruments Incorporated 6 Detailed Description 6.1 CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand. The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to- register operation execution time is one cycle of the CPU clock. Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register, and constant generator, respectively. The remaining registers are general-purpose registers. Peripherals are connected to the CPU using data, address, and control buses, and can be handled with all instructions. |
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