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HMA510JC-55 Datenblatt(PDF) 3 Page - Intersil Corporation

Teilenummer HMA510JC-55
Bauteilbeschribung  16 x 16-Bit CMOS Parallel Multiplier Accumulator
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Hersteller  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HMA510JC-55 Datenblatt(HTML) 3 Page - Intersil Corporation

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Pin Descriptions
NAME
PLCC PIN
NUMBER
TYPE
DESCRIPTION
VCC
17-20
The +5V power supply pins. 0.1
µF capacitors between the VCC and GND pins are rec-
ommended.
GND
53, 54
The device ground.
X0-X15
1-10, 63-68
I
X-Input Data. These 16 data inputs provide the multiplicand which may be in two's com-
plement or unsigned magnitude format.
Y0-Y15/
P0-P15
45-52, 55-62
I/O
Y-Input/LSP Output Data. This 16-bit port is used to provide the multiplier which may
be in two's complement or unsigned magnitude format. It may also be used for output
of the Least Significant Product (P0-P15) or for preloading the LSP Register.
P16-P3
29-44
I/O
MSP Output Data. This 16-bit port is used to provide the Most Significant Product Out-
put (P16-P31). It may also be used to preload the MSP Register.
P32-P34
26-28
I/O
XTP Output Data. This 3-bit port is used to provide the Extended Product Output (P32-
P34). It may also be used to preload the XTP Register.
TC
21
I
Two's Complement Control. Input data is interpreted as two's complement when this
control is HIGH. A LOW indicates the data is to be interpreted as unsigned magnitude
format. This control is latched on the rising edge of CLKX or CLKY.
ACC
14
I
Accumulate Control. When this control is HIGH, the Accumulator Output Register con-
tents are added to or subtracted from the current product, and the result is stored back
into the accumulator Output Register.
When LOW, the product is loaded into the accumulator Output Register overwriting the
current contents. This control is also latched on the rising edge of CLKX or CLKY.
SUB
13
I
Subtract Control. When both SUB and ACC are HIGH, the Accumulator Register con-
tents are subtracted from the current product. When ACC is HIGH and SUB is LOW,
the Accumulator Register contents and the current product are summed. The SUB con-
trol input is latched on the rising edge of CLKX or CLKY.
RND
12
I
Round Control. When this control is HIGH, a one is added to the most significant bit of
the LSP. When LOW, the product is unchanged.
PREL
23
I
Preload Control. When this control is HIGH, the three bidirectional ports may be used
to preload the Accumulator Registers. The three-state controls (OEX, OEM, OEL) must
be HIGH, and the data will be preloaded on the rising edge of CLKP. When this control
is LOW, the Accumulator Registers function in a normal manner.
OEL
11
I
Y-Input/LSP Output Port Three-State Control. When OEL is HIGH, the output drivers
are in the high impedance state. This state is required for Y-data input or preloading the
LSP Register. When OEL is LOW, the port is enabled for LSP output.
OEM
24
I
MSP Output Port Three-State Control. A LOW on this control line enables the port for
output. When OEM is HIGH, the output drivers are in the high impedance state.
This control must be HIGH for preloading the MSP Register.
OEX
22
I
XTP Output Port Three-State Control. A LOW on this control line enables the port for
output. When OEX is HIGH, the output drivers are in the high impedance state. This
control must be HIGH for preloading the XTP Register.
CLKX
15
I
X-Register Clock. The rising edge of this clock latches the X-Data Input Register along
with the TC, ACC, SUB and RND inputs.
CLKY
16
I
Y-Register Clock. The rising edge of this clock latches the Y-Data Input Register along
with the TC, ACC, SUB and RND inputs.
CLKP
25
I
Product Register Clock. The rising edge of CLKP latches the LSP, MSP and XTP Reg-
isters. If the preload control is active, the data on the I/O ports is loaded into these reg-
isters. If preload is not active, the accumulated product is loaded into the registers.
HMA510


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