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TDA9965HL Datenblatt(PDF) 4 Page - NXP Semiconductors |
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TDA9965HL Datenblatt(HTML) 4 Page - NXP Semiconductors |
4 / 22 page 2004 Jul 05 4 Philips Semiconductors Product specification 12-bit, 5.0 V, 30 Msps analog-to-digital interface for CCD cameras TDA9965 PINNING SYMBOL PIN DESCRIPTION AGND4 1 analog ground 4 IN 2 data input signal from CCD AGND5 3 analog ground 5 STGE 4 clamp storage capacitor pin AGND1 5 analog ground 1 VCCA1 6 analog supply voltage 1 AGND2 7 analog ground 2 VCCA2 8 analog supply voltage 2 Vref 9 ADC clamp reference voltage input; short-circuited to ground via a capacitor PGAOUT 10 PGA amplifier signal output ADCIN 11 ADC analog signal input; externally connected to pin PGAOUT n.c. 12 not connected REGEN 13 regulator enable input (active HIGH) VRB 14 regulator reference voltage bottom VRT 15 regulator reference voltage top DEC 16 regulator decoupling; decoupled to ground via a capacitor REF32 17 internal reference voltage; decoupled to ground via a capacitor VCCA3 18 analog supply voltage 3 AGND3 19 analog ground 3 SEN 20 enable input for the serial interface shift register (active LOW) SCLK 21 serial clock input for the serial interface SDATA 22 serial data input: 10-bit PGA gain, 4-bit DAC for the frequency cut-off, 10 low significant bits for the digital ADC clamp and edge pulse control D0 23 ADC digital output 0 (LSB) D1 24 ADC digital output 1 D2 25 ADC digital output 2 D3 26 ADC digital output 3 D4 27 ADC digital output 4 D5 28 ADC digital output 5 OGND1 29 digital output ground 1 VCCO1 30 digital output supply voltage 1 OGND2 31 digital output ground 2 VCCO2 32 digital output supply voltage 2 D6 33 ADC digital output 6 D7 34 ADC digital output 7 D8 35 ADC digital output 8 D9 36 ADC digital output 9 D10 37 ADC digital output 10 D11 38 ADC digital output 11 (MSB) STDBY 39 standby control input (active HIGH); all output bits are logic 0 when standby is enabled |
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