Datenblatt-Suchmaschine für elektronische Bauteile |
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YSS932 Datenblatt(PDF) 11 Page - YAMAHA CORPORATION |
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YSS932 Datenblatt(HTML) 11 Page - YAMAHA CORPORATION |
11 / 23 page YSS932 11 /LOCK, ERR, DIRINT The same data as LOCKN, DIRERR, DIRINT of DIR STATUS Register are output from /LOCK, ERR/BS, DIRINT pins respectively. The DIRERR data is output from ERR/BS pin at BSMOD=0 setting. DBL The information, whether the DDIN input signal is a double rate signal, is output from the DBL/V pin at VMOD=0 setting. If PLL in the DIR block is locked at double rate and the free-run mode is not used, "H" level is output. If PLL in the DIR block is locked at normal rate or the free-run mode is used, "L" level is output. 1-5) Analog circuit for PLL in DIR block DIRPCO, DIRPRO These are capacitor and resistor connection pins for PLL in DIR block. As shown below, connect a 4700pF capacitor and an 8.2k Ω resistor between DIRPCO and AVSS as close as physically possible to DIRPCO and a 5.1k Ω resistor between DIRPRO and AVSS as close as physically possible to DIRPRO. 4700pF 5.1k Ω 8.2k Ω |
Ähnliche Teilenummer - YSS932 |
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Ähnliche Beschreibung - YSS932 |
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