9 / 16 page
August 2000
Specifications subject to change without notice,contact your sales representatives for the most recent information.
9/16
Ver 1.0
PID 2958 08/00
SyncMOS Technologies Inc.
SM2958
I/O Ports Timing
T6
T7
T8
T9
T10
T11
T12
T1
T2
T3
T4
T5
T6
T7
T8
inputs P0,P1
sampled
sampled
inputs P2,P3
Output by
Mov Px,Src
RxD at Serial Port
Shift Clock
(Mode 0)
current data
next data
sampled
X1
Timing Critical, Requirement of External Clock (Vss=0.0V is assumed)
Vdd-0.5V
0.45V
70%Vdd
20%Vdd-0.1V
TCHCL
TCLCL
TCHCX
TCLCH
TCLCX
Tm.I
External Program Memory Read Cycle
#PSEN
ALE
PORT 0
PORT 2
TPLPH
TLHLL
TLLPL
TAVLL
TLLAX
TPXIX
TPXIZ
TAVIV
TPLAZ
TPLIV
A0 - A7
Instruction. IN
A0 - A7
A8 - A15
A8 - A15
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