Philips Semiconductors

Product specification

74ALVCH16374

16-bit edge-triggered D-type flip-flop (3-State)

1998 Jun 18

3

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

1

1OE

Output enable input

(active LOW)

2, 3, 5, 6, 8, 9,

11, 12

1Q0 to 1Q7

3-State flip-flop outputs

4, 10, 15, 21,

28, 34, 39, 45

GND

Ground (0V)

7, 18, 31, 42

Positive supply voltage

13, 14, 16, 17,

19, 20, 22, 23

2Q0 to 2Q7

3-State flip-flop outputs

24

2OE

Output enable input

(active LOW)

25

2CP

Clock input

36, 35, 33, 32,

30, 29, 27, 26

2D0 to 2D7

Data inputs

47, 46, 44, 43,

41, 40, 38, 37

1D0 to 1D7

Data inputs

48

1CP

Clock input

LOGIC SYMBOL

1OE

2OE

1CP

2CP

1D0

1D1

1D2

1D3

1D4

1D5

1D6

1D7

2D0

2D1

2D2

2D3

2D4

2D5

2D6

2D7

1Q0

1Q1

1Q2

1Q3

1Q4

1Q5

1Q6

1Q7

2Q0

2Q1

2Q2

2Q3

2Q4

2Q5

2Q6

2Q7

47

46

44

43

41

40

38

37

36

35

33

32

30

29

27

26

48

25

23

22

20

19

17

16

14

13

12

11

9

8

6

5

3

2

24

1

SW00075

LOGIC DIAGRAM

DQ

CP

FF1

1D0

1CP

1OE

1Q0

TO 7 OTHER CHANNELS

DQ

CP

FF9

2D0

2CP

2OE

2Q0

TO 7 OTHER CHANNELS

SW00076

FUNCTION TABLE

OPERATING MODES

INPUTS

INTERNAL

OUTPUTS

OPERATING MODES

OE

CP

Dn

FLIP-FLOPS

Q0 to Q7

Load and read register

L

L

°

°

l

h

L

H

L

H

Load register and disable outputs

H

H

°

°

l

h

L

H

Z

Z

H = HIGH voltage level

h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition

L = LOW voltage level

l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition

Z = high impedance OFF-state

° = LOW-to-HIGH CP transition