Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

74LVC109DB Datenblatt(PDF) 6 Page - NXP Semiconductors

Teilenummer 74LVC109DB
Bauteilbeschribung  Dual JK flip-flop with set and reset; positive-edge trigger
Download  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC109DB Datenblatt(HTML) 6 Page - NXP Semiconductors

Back Button 74LVC109DB Datasheet HTML 2Page - NXP Semiconductors 74LVC109DB Datasheet HTML 3Page - NXP Semiconductors 74LVC109DB Datasheet HTML 4Page - NXP Semiconductors 74LVC109DB Datasheet HTML 5Page - NXP Semiconductors 74LVC109DB Datasheet HTML 6Page - NXP Semiconductors 74LVC109DB Datasheet HTML 7Page - NXP Semiconductors 74LVC109DB Datasheet HTML 8Page - NXP Semiconductors 74LVC109DB Datasheet HTML 9Page - NXP Semiconductors 74LVC109DB Datasheet HTML 10Page - NXP Semiconductors  
Zoom Inzoom in Zoom Outzoom out
 6 / 10 page
background image
Philips Semiconductors
Product specification
74LVC109
Dual JK flip-flop with set and reset; positive-edge trigger
1998 Apr 28
6
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5 × VCC at VCC < 2.7 V.
VOL and VOH are the typical output voltage drop that occur with the output load.
The shaded areas indicate when the input is permitted to change
for predictable output performance.
SV00522
1/f max
t h
t h
t PLH
t PHL
t PLH
t PHL
t W
t su
t su
VM
VM
VM
VM
nJ, nK
INPUT
nCP
INPUT
nQ
OUTPUT
VI
VI
GND
GND
VOH
VOH
VOL
VOL
nQ
OUTPUT
Figure 1. Clock (nCP) to output (nQ, nQ) propagation delays,
the clock pulse width, the nJ and nK to nCP set-up,
the nCP to nJ, nK hold times
and the maximum clock pulse frequency.
SV00523
tW
tW
tPLH
tPHL
trem
VM
VM
VM
VM
VM
nSD
INPUT
nRD
INPUT
nCP
INPUT
nQ
OUTPUT
VOH
Vl
Vl
Vl
VOH
VOL
VOL
GND
GND
GND
nQ
OUTPUT
trem
tPLH
tPHL
Figure 2. Set (nSD) and reset (nRD) input to output (nQ, nQ)
propagation delays, the set and reset pulse widths
and the nRD, nSD to nCP removal time.
TEST CIRCUIT
VM
VM
tW
NEGATIVE
PULSE
10%
10%
90%
90%
0V
VM
VM
tW
VI
POSITIVE
PULSE
90%
90%
10%
10%
0V
tTHL (tf)
tTLH (tr)tTHL (tf)
tTLH (tr)
VM = 1.5V
Input Pulse Definition
SWITCH POSITION
PULSE
GENERATOR
RT
Vl
D.U.T.
VO
CL
RL
Vcc
RL
Test Circuit for Outputs
Open
GND
S1
DEFINITIONS
VCC
VI
< 2.7V
2.7–3.6V
VCC
2.7V
TEST
S1
tPLH/tPHL
Open
≥ 4.5 V
VCC
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance:
See AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
VI
SV00904
2
< VCC
Figure 3. Load circuitry for switching times.


Ähnliche Teilenummer - 74LVC109DB

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
NXP Semiconductors
74LVC10 PHILIPS-74LVC10 Datasheet
108Kb / 8P
   Triple 3-input NAND gate
1997 Apr 28
74LVC10A PHILIPS-74LVC10A Datasheet
84Kb / 8P
   Triple 3-input NAND gate
1998 Apr 28
logo
Nexperia B.V. All right...
74LVC10A NEXPERIA-74LVC10A Datasheet
233Kb / 12P
   Triple 3-input NAND gate
Rev. 6 - 15 April 2021
74LVC10ABQ NEXPERIA-74LVC10ABQ Datasheet
233Kb / 12P
   Triple 3-input NAND gate
Rev. 6 - 15 April 2021
logo
NXP Semiconductors
74LVC10AD PHILIPS-74LVC10AD Datasheet
84Kb / 8P
   Triple 3-input NAND gate
1998 Apr 28
More results

Ähnliche Beschreibung - 74LVC109DB

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
Nexperia B.V. All right...
74HCT109 NEXPERIA-74HCT109 Datasheet
271Kb / 16P
   Dual JK flip-flop with set and reset; positive-edge-trigger
Rev. 5 - 5 August 2021
logo
NXP Semiconductors
74HC109 PHILIPS-74HC109 Datasheet
65Kb / 9P
   Dual JK flip-flop with set and reset; positive-edge trigger
1997 Nov 25
logo
Nexperia B.V. All right...
74HCT109-Q100 NEXPERIA-74HCT109-Q100 Datasheet
257Kb / 16P
   Dual JK flip-flop with set and reset; positive-edge-trigger
Rev. 2 - 1 April 2020
logo
NXP Semiconductors
74LV109 PHILIPS-74LV109 Datasheet
124Kb / 12P
   Dual JK flip-flop with set and reset; positive-edge trigger
1998 Apr 20
logo
Nexperia B.V. All right...
74HC109-Q100 NEXPERIA-74HC109-Q100 Datasheet
799Kb / 17P
   Dual JK flip-flop with set and reset; positive-edge-trigger
74HCT112 NEXPERIA-74HCT112 Datasheet
267Kb / 16P
   Dual JK flip-flop with set and reset; negative-edge trigger
Rev. 4 - 11 January 2021
logo
NXP Semiconductors
74HC112 PHILIPS-74HC112 Datasheet
106Kb / 15P
   Dual JK flip-flop with set and reset; negative-edge trigger
1998 Jun 10
logo
Motorola, Inc
MC74HC76 MOTOROLA-MC74HC76 Datasheet
148Kb / 5P
   Dual JK Flip-Flop With Set and Reset
logo
Texas Instruments
CD54HC74 TI-CD54HC74 Datasheet
43Kb / 8P
[Old version datasheet]   Dual D Flip-Flop with Set and Reset Positive-Edge Trigger
CD54HCT74 TI-CD54HCT74 Datasheet
276Kb / 12P
[Old version datasheet]   Dual D Flip-Flop with Set and Reset Positive-Edge Trigger
More results


Html Pages

1 2 3 4 5 6 7 8 9 10


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com