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MC100ELT20DG Datenblatt(PDF) 1 Page - ON Semiconductor |
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MC100ELT20DG Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 5 1 Publication Order Number: MC10ELT20/D MC10ELT20, MC100ELT20 5VTTL to Differential PECL Translator Description The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the ELT20 makes it ideal for those applications where space, performance, and low power are at a premium. The 100 Series contains temperature compensation. Features • 1.2 ns Typical Propagation Delay • PNP TTL Inputs for Minimal Loading • Flow Through Pinouts • Operating Range: VCC = 4.75 V to 5.25 V with GND = 0 V • Pb−Free Packages are Available A = Assembly Location L = Wafer Lot Y = Year W = Work Week M = Date Code G = Pb−Free Package H = MC10 K = MC100 5B = MC10 2P = MC100 SO−8 D SUFFIX CASE 751 MARKING DIAGRAMS* TSSOP−8 DT SUFFIX CASE 948R ALYWG G HT20 ALYWG G KT20 1 8 1 8 1 8 http://onsemi.com *For additional marking information, refer to Application Note AND8002/D. See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ORDERING INFORMATION 1 8 HLT20 ALYW G 1 8 KLT20 ALYW G 1 8 DFN8 MN SUFFIX CASE 506AA 14 14 (Note: Microdot may be in either location) |
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