Datenblatt-Suchmaschine für elektronische Bauteile |
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MC14LC5447 Datenblatt(PDF) 4 Page - Motorola, Inc |
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MC14LC5447 Datenblatt(HTML) 4 Page - Motorola, Inc |
4 / 12 page MC14LC5447 MOTOROLA 4 12 RDO 13 CDO 14 DOR 3.579 MHz 15 DOC 11 CLKSIN 10 OSCin 9 OSCout PWRUP 7 RT 6 NC 5 RDI1 3 RI 2 TI 1 30 pF RDI2 4 OPEN VDD 0.1 µF 30 pF 10 M Ω 16 8 RT PWRUP IDD OSCin 11 1 µA MAX DISABLE 0 1 2.4 mA TYP ENABLE X 0 6.2 mA TYP ENABLE VDD Figure 1. IDD Test Circuit PIN DESCRIPTIONS TI Tip Input (Pin 1) This input pin is normally connected to the tip side of the twisted pair. It is internally biased to 1/2 supply voltage when the device is in the power–up mode. This pin must be dc iso- lated from the line. RI Ring Input (Pin 2) This input is normally connected to the ring side of the twisted pair. It is internally biased to 1/2 supply voltage when the device is in the power–up mode. This pin must be dc iso- lated from the line. RDI1 Ring Detect Input 1 (Pin 3) This input is normally coupled to one of the twisted pair wires through an attenuating network. It detects energy on the line and enables the oscillator and precision ring detec- tion circuitry. RDI2 Ring Detect Input 2 (Pin 4) This input to the precision ring detection circuit is normally coupled to one of the twisted pair wires through an atte- nuating network. A valid ring signal as determined from this input sends the RDO (Pin 12) to a logic 0. RT Ring Time (Pin 6) An RC network may be connected to this pin. The RC time constant is chosen to hold this pin voltage below 2.2 V be- tween the peaks of the ringing signal. RT is an internal power–up control and activates only the circuitry necessary to determine if the incoming ring is valid. PWRUP Power Up (Pin 7) A logic 0 on the PWRUP input causes the device to be in the active mode ready to demodulate incoming data. A logic 1 on this pin causes the device to be in the standby mode, if the RT input pin is at a logic 1. This pin may be con- trolled by RDO and CDO for auto power–up operation. For other applications, this pin may be controlled externally. VSS Ground (Pin 8) Ground return pin is typically connected to the system ground. OSCout Oscillator Output (Pin 9) This pin will have either a crystal or a ceramic resonator tied to it with the other end connected to OSCin. OSCin Oscillator Input (Pin 10) This pin will have either a crystal or a ceramic resonator tied to it with the other end connected to OSCout. OSCin may also be driven directly from an appropriate external source. CLKSIN Clock Select Input (Pin 11) A logic 1 on this input configures the device to accept ei- ther a 3.579 MHz or 3.6864 MHz crystal. A logic 0 on this pin configures the part to operate with a 455 kHz resonator. For crystal and resonator specifications see Table 1. RDO Ring Detect Out (Pin 12) This open–drain output goes low when a valid ringing signal is detected. RDO remains low as long as the ringing signal remains valid. This signal can be used for auto power– up, when connected to Pin 7. CDO Carrier Detect Output (Pin 13) When low, this open drain output indicates that a valid carrier is present on the line. CDO remains low as long as the carrier remains valid. An 8 ms hysteresis is built in to allow for a momentary drop out of the carrier. CDO may be used in the auto power–up configuration when connected to PWRUP. AR CH IVE D B Y F RE ES CA LE SE MI CO ND UC TO R, INC . |
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