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ISL12027IV30AZ-T Datenblatt(PDF) 3 Page - Intersil Corporation

Teilenummer ISL12027IV30AZ-T
Bauteilbeschribung  Real Time Clock/Calendar with EEPROM
Download  28 Pages
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Hersteller  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL12027IV30AZ-T Datenblatt(HTML) 3 Page - Intersil Corporation

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FN8232.4
October 18, 2006
Pin Descriptions
PIN NUMBER
SYMBOL
BRIEF DESCRIPTION
SOIC
TSSOP
1
3
X1
The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal. X1 can also be driven directly from a 32.768kHz source.
2
4
X2
The X2 pin is the output of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal.
3
5
RESET
RESET. This is a reset signal output. This signal notifies a host processor that the “watchdog” time period
has expired or that the voltage has dropped below a fixed VTRIP threshold. It is an open drain active LOW
output. Recommended value for the pull-up resistor is 5k
Ω, If unused, connect to ground.
4
6
GND
Ground.
5
7
SDA
Serial Data (SDA) is a bidirectional pin used to transfer serial data into and out of the device. It has an
open drain output and may be wire OR’ed with other open drain or open collector outputs.
6
8
SCL
The Serial Clock (SCL) input is used to clock all serial data into and out of the device. The input buffer on
this pin is always active (not gated).
71
VBAT
This input provides a backup supply voltage to the device. VBAT supplies power to the device in the event
that the VDD supply fails. This pin should be tied to ground if not used.
82
VDD
Power Supply.
ISL12027


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