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MC145202F Datenblatt(PDF) 7 Page - Motorola, Inc

Teilenummer MC145202F
Bauteilbeschribung  Low-Voltage 2.0 GHz PLL Frequency Synthesizer Includes On-Board 64/65 Prescaler
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Hersteller  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC145202F Datenblatt(HTML) 7 Page - Motorola, Inc

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MC145202
MOTOROLA
7
LOOP SPECIFICATIONS (VDD = VCC = 2.7 to 5.5 V unless otherwise indicated, TA = – 40 to + 85°C)
Sb l
P
T
C
di i
Fig.
Guaranteed
Operating
Range
Ui
Symbol
Parameter
Test Condition
Fig.
No.
Min
Max
Unit
Pin
Input Sensitivity Range, fin
500 MHz
≤ fin ≤ 2000 MHz
7
– 10
4
dBm*
fref
Input Frequency, REFin Externally Driven in
Reference Mode
Vin ≥ 400 mV p–p
2.7
≤ VDD < 4.5 V
4.5
≤ VDD ≤ 5.5 V
8
1.5
1.5
20
30
MHz
fXTAL
Crystal Frequency, Crystal Mode
C1
≤ 30 pF, C2 ≤ 30 pF, Includes Stray
Capacitance
9
2
15
MHz
fout
Output Frequency, REFout
CL = 20 pF, Vout ≥ 1 V p–p
10, 12
dc
10
MHz
f
Operating Frequency of the Phase Detectors
dc
2
MHz
tw
Output Pulse Width (
φR, φV, and LD)
fR in Phase with fV, CL = 20 pF, φR and φV
active for LD measurement, **
VPD = 2.7 to 5.5 V
VDD = 2.7 V
VDD = 4.5 V
VDD = 5.5 V
11, 12
40
18
14
120
60
50
ns
tTLH,
tTHL
Output Transition Times (LD,
φV, and φR)
CL = 20 pF, VPD = 2.7 V,
VDD = VCC = 2.7 V
11, 12
80
ns
Cin
Input Capacitance, REFin
7
pF
* Power level at the input to the dc block.
** When PDout is active, LD minimum pulse width is approximately 5 ns.
Figure 7. Test Circuit
SINE WAVE
GENERATOR
50
DEVICE
UNDER
TEST
0.01
µF
TEST
POINT
VCC
VDD
REFin
GND
OUTPUT A
Vin
Figure 8. Test Circuit — Reference Mode
(fR)
TEST
POINT
REFout
V+
DEVICE UNDER
TEST
C1
TEST
POINT
VCC
VDD
OUTPUT A
GND
REFin
REFout
C2
Figure 9. Test Circuit — Crystal Mode
(fR)
V+
50%
REFout
1 / f REFout
Figure 10. Switching Waveform
10%
90%
OUTPUT
tTLH
tTHL
Figure 11. Switching Waveform
50%
tw
TEST POINT
DEVICE
UNDER
TEST
CL*
* Includes all probe and
fixture capacitance.
Figure 12. Test Circuit
DC
BLOCK
50
Ω PAD
SINE WAVE
GENERATOR
50
VCC
VDD
GND
V+
TEST
POINT
OUTPUT A
(fV)
DEVICE
UNDER
TEST
fin
fin
NOTE: Alternately, the 50
Ω pad may be a T network.


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