Datenblatt-Suchmaschine für elektronische Bauteile |
|
FIN324CGFX Datenblatt(PDF) 10 Page - Fairchild Semiconductor |
|
FIN324CGFX Datenblatt(HTML) 10 Page - Fairchild Semiconductor |
10 / 23 page © 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FIN324C Rev. 1.0.5 10 Application Diagrams (Continued) VDDP1 A4 B4 D4:G6 C4 C3 A3 B3 A2 NC B2 NC A1 NC D3 F3 G3 G2 B1 Notes: 1. Write-only interface (R/W hardwaired LOW). 2. SPI sub-display interface PAR/SPI=LOW for both master and slave. . 3. SCLK connected to CNTL[5]; SDAT connected to CNTL[4]. 4. 5. 6. Shared data pin SDAT; SCLK connections on sub-display. Assumes BGA die on display. Pin numbers for BGA package. /CS PCLK GPIO /STBY /RES CKSEL Main Display PCLK R,G,B [5:0] Hsync Vsync SD Sub-Display SCLK SDAT /CS D/C RESET P/S VDDP2 Edge Rate Control Option SLEW must be connected to VDDS or GND for low power. VDDP VDDS/A STRB0 STRB1 CNTL[5] R/W M/S PAR/SPI /STBY /RES CKSEL R,G,B[5:0] DP[17:0] Hsync CNTL[0] Vsync CNTL[1] D/C CNTL[3] SD CNTL[2] SDAT CNTL[4] VDDP VDDS/A WCLK0 WCLK1 DP[17:0] CNTL[0] CNTL[1] CNTL[2] CNTL[3] CNTL[4] CNTL[5] R/W M/S PAR/SPI SLEW /RES H VDDP1 VDDS/A VDDP2 VDDS/A CKS+ CKS- DS+ DS- CKS+ CKS- DS+ DS- D1 E1 G1 F1 G1 F1 D1 E1 A4 B4 D4:G6 C4 C3 A3 B3 A2 B2 A1 D3 F3 G3 G2 B1 E3 D2 C1 E3 D2 C1 C2 E2 F2 C2 E2 F2 SCLK Module 1 F6 SCLK DP[6] E5 SDAT DP[7] Baseband Processor Figure 8. Dual Display with RGB Main Display and SPI Sub-Display Interface VDDP1 A4 B4 D4:G6 C4 C3 A3 B3 A2 B2 A1 D3 F3 G3 G2 B1 Notes: 1. R/W interface. R/W signal connected to baseband microprocessor. . 2. 3. 4. Assumes BGA die on display. PAR/SPI connected HIGH to indicate parallel operation. Pin numbers for BGA package. . /CS0 /CS1 GPIO /STBY /RES CKSEL Main Display /CS1 DATA[17:0] D/C RESET 1 R/W Sub-Display DATA [17:0] D/C /CS0 RESET 0 P/S R/W VDDP2 Edge Rate Control Option SLEW must be connected to VDDS or GND for low power. VDDP VDDS/A STRB0 STRB1 CNTL[5] R/W M/S PAR/SPI /STBY /RES CKSEL DATA[17:0] DP[17:0] CNTL[0] CNTL[1] D/C RESET 0 RESET 1 CNTL[3] CNTL[2] CNTL[4] VDDP VDDS/A WCLK0 WCLK1 DP[17:0] CNTL[0] CNTL[1] CNTL[2] CNTL[3] CNTL[4] CNTL[5] R/W M/S PAR/SPI SLEW /RES H VDDP1 VDDS/A VDDP2 VDDS/A CKS+ CKS- DS+ DS- CKS+ CKS- DS+ DS- D1 E1 G1 F1 G1 F1 D1 E1 A4 B4 D4:G6 C4 C3 A3 B3 A2 B2 A1 D3 F3 G3 G2 B1 E3 D2 C1 E3 D2 C1 C2 E2 F2 C2 E2 F2 Module 1 R/W NC NC NC Baseband Processor Figure 9. R/W Dual Display with Parallel Microcontroller Main Display and Sub-Display |
Ähnliche Teilenummer - FIN324CGFX |
|
Ähnliche Beschreibung - FIN324CGFX |
|
|
Link URL |
Privatsphäre und Datenschutz |
ALLDATASHEETDE.COM |
War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |