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MC10E156FNG Datenblatt(PDF) 1 Page - ON Semiconductor

Teilenummer MC10E156FNG
Bauteilbeschribung  5V ECL 3-Bit 4:1 Mux-Latch
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 8
1
Publication Order Number:
MC10E156/D
MC10E156, MC100E156
5VECL 3-Bit 4:1 Mux-Latch
Description
The MC10E/100E156 contains three 4:1 multiplexers followed by
transparent latches with differential outputs. When both Latch Enables
(LEN1, LEN2) are LOW, the latch is transparent, and output date is
controlled by the multiplexer select controls (SEL0, SEL1). A logic
HIGH on either LEN1 or LEN2 (or both) latches the outputs. The
Master Reset (MR) overrides all other controls to set the Q outputs
LOW.
The 100 Series contains temperature compensation.
Features
950 ps Max. D to Output
850 ps Max. LEN to Output
Differential Outputs
Asynchronous Master Reset
Dual Latch-Enables
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
NECL Mode Operating Range: VCC= 0 V
with VEE = −4.2 V to −5.7 V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 271 devices
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
PLCC−28
FN SUFFIX
CASE 776
MCxxxE156FNG
AWLYYWW
1
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION


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