MC44608

http://onsemi.com

7

Figure 6.

Vcont

2.4 V

Iprim

DMG

Clock

OSC

4 V

The OSC and Clock signals are provided according to the

Figure 6. The Clock signals correspond to the CT capacitor

discharge. The bottom curve represents the current flowing

in the sense resistor Rcs. It starts from zero and stops when

the sawtooth value is equal to the control voltage Vcont. In

this way the SMPS is regulated with a voltage mode control.

Overvoltage Protection

The MC44608 offers two OVP functions:

15.4 V

− a programmable function that uses the demag pin. The

current flowing into the demag pin is mirrored and

compared to the reference current Iovp (120

mA). Thus this

is called QOVP.

In both cases, once an OVP condition is detected, the

output is latched off until a new circuit startup.

Startup Management

This high voltage current source is internally connected to

9.0 mA current source is disabled and the device starts

working. The device enters into the switching phase.

is 500 V. ESD protection circuitry is not currently added to

this pin due to size limitations and technology constraints.

Protection is limited by the drain−substrate junction in

avalanche breakdown. To help increase the application

safety against high voltage spike on that pin it is possible to

insert a small wattage 1.0 k

rail and pin 8.

pin during the switching phase. This case can be

encountered in SMPS when the self supply through an

auxiliary winding is not present (strong overload on the

SMPS output for example). The Figure 17 also depicts this

working configuration.

Figure 7. Hiccup Mode

Startup

Latched off

Phase

Switching

Phase

Phase

V

CC

6.5 V

10 V

13 V

In case of the hiccup mode, the duty cycle of the switching

phase is in the range of 10%.

Mode Transition

The LW latch Figure 8 is the memory of the working status

at the end of every switching sequence.

Two different cases must be considered for the logic at the

termination of the SWITCHING PHASE:

1. No Over Current was observed

2. An Over Current was observed

These 2 cases are corresponding to the signal labelled

NOC in case of “No Over Current” and “OC” in case of Over

Current. So the effective working status at the end of the ON

time memorized in LW corresponds to Q=1 for no over

current and Q=0 for over current.

This sequence is repeated during the Switching phase.

Several events can occur:

1. SMPS switch OFF

2. SMPS output overload

3. Transition from Normal to Pulsed Mode

4. Transition from Pulsed Mode to Normal Mode

Figure 8. Transition Logic

&

I

SQ

R

LW

+

−

&

CS

Q

&

R2

Q

S

Mode

LEB out

1 V

VPWM

OUT

Standby

R1

Startup

Phase

Switching

Phase

Startup

Phase

NOC

OC

> 24 A

m

Latched Off

Phase

&

demag

S1

Switch

• 1. SMPS SWITCH OFF

When the mains is switched OFF, so long as the bulk

electrolithic bulk capacitor provides energy to the SMPS,

the controller remains in the switching phase. Then the peak

current reaches its maximum peak value, the switching

frequency decreases and all the secondary voltages are

equal to 10 V, the SMPS stops working.