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MC10EP101FA Datenblatt(PDF) 2 Page - ON Semiconductor

Teilenummer MC10EP101FA
Bauteilbeschribung  3.3V / 5V ECL Quad 4?묲nput OR/NOR
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10EP101FA Datenblatt(HTML) 2 Page - ON Semiconductor

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MC10EP101, MC100EP101
http://onsemi.com
2
NC
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
12345678
24
23
22
21
20
19
18
17
16
MC10EP101
MC100EP101
VEE
D3d
D3c
VCC
D3b
D3a
D2d
VCC
VCC
Q0
Q0
VEE
D0a
D0b
D0c
VCC
Q3
Q3
Q2
Q2
Q1
VCC
D2c
D2b
D2a
D1d
D1c
D1b
D0d D1a
Figure 1. 32−Lead LQFP Pinout (Top View)
Q1
Warning: All VCC and VEE pins must be externally connected to
Power Supply to guarantee proper operation.
Table 1. PIN DESCRIPTION
PIN
D0a*−D3d*
Q0−Q3, Q0−Q3
ECL Data Outputs
FUNCTION
ECL Data Inputs
VCC
Positive Supply
VEE
Negative Supply
D0a
D0b
D0c
D0d
D1a
D1b
D1c
D1d
D2a
D2b
D2c
D2d
D3a
D3b
D3c
D3d
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Dna
Dnb
Dnc
Dnd
Qn
Qn
LL
L
L
L
H
H
XXX
H
L
XH
X
X
H
L
X
X
HX
HL
X
XXH
H
L
H
HHH
HL
Table 2. TRUTH TABLE
NC
No Connect
VEE
* Pins will default LOW when left open.
NC
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
VEE D3d D3c VCC D3b D3a D2d
VCC VCC Q0 Q0 VEE D0a D0b D0c
VCC
Q2
VCC
D2c
D2b
D2a
D1d
D1c
D1b
D0d
D1a
Q1
Q2
Q3
Q3
Q1
MC10EP101
MC100EP101
Figure 2. 32−Lead QFN Pinout (Top View)
Figure 3. Logic Diagram
The Exposed Pad (EP) on the
QFN−32 package bottom is
thermally connected to the die
for improved heat transfer out
of package. The exposed pad
must be attached to a heat−
sinking conduit. The pad is
electrically connected to VEE.
EP for QFN−32,
only


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