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MC100LVEL33DTR2G Datenblatt(PDF) 1 Page - ON Semiconductor

Teilenummer MC100LVEL33DTR2G
Bauteilbeschribung  3.3V ECL 첨4 Divider
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 4
1
Publication Order Number:
MC100LVEL33/D
MC100LVEL33
3.3VECL ÷4 Divider
Description
The MC100LVEL33 is an integrated ÷4 divider. The LVEL is
functionally equivalent to the EL33 and works from a 3.3 V supply.
The reset pin is asynchronous and is asserted on the rising edge.
Upon power-up, the internal flip-flops will attain a random state; the
reset allows for the synchronization of multiple LVEL33’s in a system.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
Features
630 ps Typical Propagation Delay
4.0 GHz Typical Maximum Frequency
ESD Protection: >4 kV Human Body Model,
>200 V Machine Model
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
NECL Mode Operating Range: VCC= 0 V
with VEE = −3.0 V to −3.8 V
Internal Input Pulldown Resistors
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 130 devices
Pb−Free Packages are Available
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAMS*
KV33
ALYWG
G
SOIC−8
D SUFFIX
CASE 751
1
8
TSSOP−8
DT SUFFIX
CASE 948R
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
KVL33
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506AA
14
(Note: Microdot may be in either location)
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = Pb−Free Package


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