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MC1488MG Datenblatt(PDF) 6 Page - ON Semiconductor

Teilenummer MC1488MG
Bauteilbeschribung  Quad Line EIA??32D Driver
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC1488MG Datenblatt(HTML) 6 Page - ON Semiconductor

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MC1488
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APPLICATIONS INFORMATION
The Electronic Industries Association EIA−232D
specification details the requirements for the interface
between
data
processing
equipment
and
data
communications equipment. This standard specifies not
only the number and type of interface leads, but also the
voltage levels to be used. The MC1488 quad driver and its
companion circuit, the MC1489 quad receiver, provide a
complete interface system between DTL or TTL logic levels
and the EIA−232D defined levels. The EIA−232D
requirements as applied to drivers are discussed herein.
The required driver voltages are defined as between
5.0 and 15 V in magnitude and are positive for a Logic “0”
and negative for a Logic “1.” These voltages are so defined
when the drivers are terminated with a 3000 to 7000
W
resistor. The MC1488 meets this voltage requirement by
converting a DTL/TTL logic level into EIA−232D levels
with one stage of inversion.
The EIA−232D specification further requires that
during transitions, the driver output slew rate must not
exceed 30 V per microsecond. The inherent slew rate of the
MC1488 is much too fast for this requirement. The current
limited output of the device can be used to control this slew
rate by connecting a capacitor to each driver output. The
required capacitor can be easily determined by using the
relationship C = IOS x DT/DV from which Figure 14 is
derived. Accordingly, a 330 pF capacitor on each output
will guarantee a worst case slew rate of 30 V per
microsecond.
1000
10
100
1.0
10
333 pF
30 V/
ms
Figure 14. Slew Rate versus Capacitance
for ISC = 10 mA
C, CAPACITANCE (pF)
10,000
100
1,000
1.0
The interface driver is also required to withstand an
accidental short to any other conductor in an
interconnecting cable. The worst possible signal on any
conductor would be another driver using a plus or minus
15 V, 500 mA source. The MC1488 is designed to
indefinitely withstand such a short to all four outputs in a
package as long as the power supply voltages are greater
than 9.0 V (i.e., VCC q 9.0 V; VEE p − 9.0 V). In some
power supply designs, a loss of system power causes a low
impedance on the power supply outputs. When this occurs,
a low impedance to ground would exist at the power inputs
to the MC1488 effectively shorting the 300
W output
resistors to ground. If all four outputs were then shorted to
plus or minus 15 V, the power dissipation in these resistors
would be excessive. Therefore, if the system is designed to
permit low impedances to ground at the power supplies of
the drivers, a diode should be placed in each power supply
lead to prevent overheating in this fault condition. These two
diodes, as shown in Figure 15, could be used to decouple all
the driver packages in a system. (These same diodes will
allow the MC1488 to withstand momentary shorts to the
±25 V limits specified in the earlier Standard EIA−232B.)
The addition of the diodes also permits the MC1488 to
withstand faults with power supplies of less than the 9.0 V
stated above.
Figure 15. Power Supply Protection
to Meet Power Off Fault Conditions
VCC
14
MC1488
VEE
7
MC1488
14
MC1488
14
7
1
17
1
The maximum short circuit current allowable under
fault conditions is more than guaranteed by the previously
mentioned 10 mA output current limiting.
Other Applications
The MC1488 is an extremely versatile line driver with
a myriad of possible applications. Several features of the
drivers enhance this versatility:
1. Output Current Limiting − this enables the circuit
designer to define the output voltage levels independent of
power supplies and can be accomplished by diode
clamping of the output pins. Figure 16 shows the MC1488
used as a DTL to MOS translator where the high level
voltage output is clamped one diode above ground. The
resistor divider shown is used to reduce the output voltage
below the 300 mV above ground MOS input level limit.


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