Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

AM29BDS643GT7GVAI Datenblatt(PDF) 11 Page - Advanced Micro Devices

Teilenummer AM29BDS643GT7GVAI
Bauteilbeschribung  64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
Download  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29BDS643GT7GVAI Datenblatt(HTML) 11 Page - Advanced Micro Devices

Back Button AM29BDS643GT7GVAI Datasheet HTML 7Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 8Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 9Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 10Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 11Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 12Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 13Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 14Page - Advanced Micro Devices AM29BDS643GT7GVAI Datasheet HTML 15Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 49 page
background image
May 8, 2006 25692A2
Am29BDS643G
9
D A TA
SH EE T
DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register it-
self does not occupy any addressable memory loca-
tion. The register is composed of latches that store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function of
the device. Table 1 lists the device bus operations, the
inputs and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
Table 1.
Device Bus Operations
Legend: L = Logic 0, H = Logic 1, X = Don’t Care.
Requirements for Asynchronous
Read Operation (Non-Burst)
To read data from the memory array, the system must
asser t a valid address on A/DQ0–A/DQ15 and
A16–A21, while AVD# and CE# are at VIL. WE#
should remain at VIH. Note that CLK must not be
switching during asynchronous read operations. The
rising edge of AVD# latches the address, after which
the system can drive OE# to VIL. The data will appear
on A/DQ0–A/DQ15. (See Figure 11.) Since the mem-
ory array is divided into four banks, each bank remains
enabled for read access until the command register
contents are altered.
Address access time (tACC) is equal to the delay from
stable addresses to valid output data. The chip enable
access time (tCE) is the delay from the stable
addresses and stable CE# to valid data at the outputs.
The output enable access time (tOE) is the delay from
the falling edge of OE# to valid data at the output.
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory
content occurs during the power transition.
Requirements for Synchronous (Burst)
Read Operation
The device is capable of four different burst read modes
(see Table 8): continuous burst read; and 8-, 16-, and
32-word linear burst reads with wrap around capability.
Continuous Burst
When the device first powers up, it is enabled for asyn-
chronous read operation. The device will automatically
be enabled for burst mode on the first rising edge on
the CLK input, while AVD# is held low for one clock
cycle. Prior to activating the clock signal, the system
should determine how many wait states are desired for
the initial word (tIACC) of each burst session. The
system would then write the Set Configuration Register
command sequence. The system may optionally acti-
vate the PS mode (see “Power Saving Function”) by
writing the Enable PS Mode command sequence at
this time, but note that the PS mode can only be dis-
abled by a hardware reset. (See “Command Defini-
Operation
CE#
OE#
WE#
A16–21 A/DQ0–15 RESET#
CLK
AVD#
Asynchronous Read
L
L
H
Addr In
I/O
H
H/L
Write
L
H
L
Addr In
I/O
H
H/L
Standby (CE#)
H
X
X
X
HIGH Z
H
H/L
X
Hardware Reset
X
X
X
X
HIGH Z
L
X
X
Burst Read Operations
Load Starting Burst Address
L
H
H
Addr In
Addr In
H
Advance Burst to next address with appropriate
Data presented on the Data Bus
LL
H
X
Burst
Data Out
HH
Terminate current Burst read cycle
H
X
H
X
HIGH Z
H
X
Terminate current Burst read cycle via RESET#
X
X
H
X
HIGH Z
L
X
X
Terminate current Burst read cycle and start
new Burst read cycle
L
H
H
X
I/O
H


Ähnliche Teilenummer - AM29BDS643GT7GVAI

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
SPANSION
AM29BDS643GT7GVAI SPANSION-AM29BDS643GT7GVAI Datasheet
714Kb / 49P
   64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
More results

Ähnliche Beschreibung - AM29BDS643GT7GVAI

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
SPANSION
AM29BDS640G SPANSION-AM29BDS640G Datasheet
899Kb / 65P
   64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
Advanced Micro Devices
AM29BDS643D AMD-AM29BDS643D Datasheet
693Kb / 46P
   64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
SPANSION
AM29BDS643G SPANSION-AM29BDS643G Datasheet
714Kb / 49P
   64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
Advanced Micro Devices
AM29BDS640G AMD-AM29BDS640G Datasheet
1Mb / 77P
   64 Megabit (4 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
SPANSION
S29WS128J SPANSION-S29WS128J Datasheet
1Mb / 98P
   128/64 Megabit (8/4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
S29WS-J SPANSION-S29WS-J Datasheet
2Mb / 97P
   128/64 Megabit (8/4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
Advanced Micro Devices
AM29BDS323D AMD-AM29BDS323D Datasheet
746Kb / 44P
   32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
SPANSION
S29WSXXXN SPANSION-S29WSXXXN Datasheet
1Mb / 95P
   256/128/64 Megabit (16/8/4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
Advanced Micro Devices
AM29N323D AMD-AM29N323D Datasheet
824Kb / 48P
   32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
logo
SPANSION
AM29BDS320G SPANSION-AM29BDS320G Datasheet
1Mb / 74P
   32 Megabit (2 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com