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AM29BDD160GT2AKE Datenblatt(PDF) 5 Page - Advanced Micro Devices

Teilenummer AM29BDD160GT2AKE
Bauteilbeschribung  16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
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Hersteller  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29BDD160GT2AKE Datenblatt(HTML) 5 Page - Advanced Micro Devices

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June 7, 2006
Am29BDD160G
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram of
Simultaneous Operation Circuit . . . . . . . . . . . . . 6
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . 7
Special Package Handling Instructions .................................... 8
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
x16 Mode .................................................................................. 9
x32 Mode .................................................................................. 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 11
Table 1. Device Bus Operation .......................................................12
VersatileI/O™ (V
IO) Control .................................................... 13
Requirements for Reading Array Data ................................... 13
Simultaneous Read/Write
Operations Overview and Restrictions ................................... 13
Overview ............................................................................. 13
Restrictions .......................................................................... 13
Table 2. Bank Assignment for Boot Bank
Sector Devices ................................................................................13
Simultaneous Read/Write Operations With Zero Latency ...... 13
Table 3. Top Boot Bank Select .......................................................14
Table 4. Bottom Boot Bank Select ..................................................14
Writing Commands/Command Sequences ............................ 14
Accelerated Program and Erase Operations ....................... 14
Autoselect Functions ........................................................... 14
Automatic Sleep Mode (ASM) ................................................ 14
RESET#: Hardware Reset Pin ............................................... 15
Output Disable Mode .............................................................. 15
Autoselect Mode ..................................................................... 15
Table 5. Am29BDD160 Autoselect Codes (High Voltage Method) .16
Asynchronous Read Operation (Non-Burst) ........................... 16
Figure 1. Asynchronous Read Operation........................................ 16
Synchronous (Burst) Read Operation .................................... 17
Linear Burst Read Operations ................................................ 17
Table 6. 16-Bit and 32-Bit Linear and Burst Data Order .................17
CE# Control in Linear Mode ................................................ 18
ADV# Control In Linear Mode .............................................. 18
RESET# Control in Linear Mode ......................................... 18
OE# Control in Linear Mode ................................................ 18
IND/WAIT# Operation in Linear Mode ................................. 18
Table 7. Valid Configuration Register Bit Definition for IND/WAIT# 20
Figure 2. End of Burst Indicator (IND/WAIT#) Timing for Linear 8-Word
Burst Operation............................................................................... 20
Burst Access Timing Control ............................................... 21
Initial Burst Access Delay Control ....................................... 21
Table 8. Burst Initial Access Delay ..................................................21
Figure 3. Initial Burst Delay Control ................................................ 21
Configuration Register ............................................................ 22
Table 9. Configuration Register Definitions .....................................22
Table 10. Configuration Register After Device Reset .....................24
Initial Access Delay Configuration .......................................... 24
Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . 24
Persistent Sector Protection ................................................... 24
Persistent Protection Bit (PPB) ............................................ 25
Persistent Protection Bit Lock (PPB Lock) .......................... 25
Dynamic Protection Bit (DYB) ............................................. 25
Table 11. Sector Protection Schemes ............................................ 26
Persistent Sector Protection Mode Locking Bit ....................... 26
Password Protection Mode ..................................................... 26
Password and Password Mode Locking Bit ............................ 26
64-bit Password ................................................................... 27
Write Protect (WP#) ................................................................ 27
SecSi™ (Secured Silicon) Sector Protection .......................... 27
SecSi Sector Protection Bit ..................................................... 28
Persistent Protection Bit Lock ................................................. 28
Hardware Data Protection ...................................................... 28
Low V
CC Write Inhibit ........................................................... 28
Write Pulse “Glitch” Protection ............................................ 28
Logical Inhibit ....................................................................... 28
Power-Up Write Inhibit ......................................................... 28
VCC and VIO Power-up And Power-down Sequencing ......... 28
Table 12. Sector Addresses for Top Boot Sector Devices ............. 29
Table 13. Sector Addresses for Bottom Boot Sector Devices ........ 30
Table 14. CFI Query Identification String ....................................... 31
Table 15. CFI System Interface String ........................................... 31
Table 16. CFI Device Geometry Definition ..................................... 32
Table 17. CFI Primary Vendor-Specific Extended Query ............... 32
Command Definitions . . . . . . . . . . . . . . . . . . . . . 34
Reading Array Data in Non-burst Mode .................................. 34
Reading Array Data in Burst Mode ......................................... 34
Read/Reset Command ........................................................... 34
Autoselect Command ............................................................. 35
Program Command Sequence ............................................... 35
Accelerated Program Command ............................................ 35
Unlock Bypass Command Sequence ..................................... 35
Figure 4. Program Operation ......................................................... 36
Unlock Bypass Entry Command .......................................... 36
Unlock Bypass Program Command .................................... 36
Unlock Bypass Chip Erase Command ................................ 36
Unlock Bypass CFI Command ............................................ 36
Unlock Bypass Reset Command ......................................... 37
Chip Erase Command ............................................................ 37
Sector Erase Command ......................................................... 37
Figure 5. Erase Operation.............................................................. 38
Sector Erase and Program Suspend Command .................... 38
Sector Erase and Program Suspend Operation Mechanics ... 38
Table 18. Allowed Operations During Erase/Program Suspend ... 38
Sector Erase and Program Resume Command ..................... 39
Configuration Register Read Command ................................. 39
Configuration Register Write Command ................................. 39
Common Flash Interface (CFI) Command .............................. 39
SecSi Sector Entry Command ................................................ 41
Password Program Command ................................................ 41
Password Verify Command .................................................... 41
Password Protection Mode Locking Bit Program Command .. 42
Persistent Sector Protection Mode Locking Bit Program Com-
mand ....................................................................................... 42
SecSi Sector Protection Bit Program Command .................... 42
PPB Lock Bit Set Command ................................................... 42
DYB Write Command ............................................................. 42
Password Unlock Command .................................................. 42
PPB Program Command ........................................................ 43


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