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74VCX16721MTD Datenblatt(PDF) 5 Page - Fairchild Semiconductor

Teilenummer 74VCX16721MTD
Bauteilbeschribung  Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
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Hersteller  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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AC Electrical Characteristics (Note 6)
Note 6: For CL = 50PF, add approximately 300 ps to the AC maximum specification.
Note 7: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Symbol
Parameter
Conditions
VCC
TA = −40°C to +85°C
Units
Figure
(V)
Min
Max
Number
fMAX
Maximum Clock Frequency
CL = 30 pF, RL = 500Ω
3.3
± 0.3
250
MHz
2.5
± 0.2
200
1.8
± 0.15
100
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
80.0
tPHL
Propagation Delay
CL = 30 pF, RL = 500Ω
3.3
± 0.3
0.8
3.5
ns
Figures
1, 2
tPLH
2.5
± 0.2
1.0
4.4
1.8
± 0.15
1.5
8.8
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
1.0
17.6
Figures
7, 8
tPZL
Output Enable Time
CL = 30 pF, RL = 500Ω
3.3
± 0.3
0.8
3.8
ns
Figures
1, 3, 4
tPZH
2.5
± 0.2
1.0
4.9
1.8
± 0.15
1.5
9.8
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
1.0
19.6
Figures
7, 9, 10
tPLZ
Output Disable Time
CL = 30 pF, RL = 500Ω
3.3
± 0.3
0.8
3.7
ns
Figures
1, 3, 4
tPHZ
2.5
± 0.2
1.0
4.2
1.8
± 0.15
1.5
7.6
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
1.0
15.2
Figures
7, 9, 10
tS
Setup Time
CL = 30 pF, RL = 500Ω
3.3
± 0.3
1.5
ns
Figure 6
2.5
± 0.2
1.5
1.8
± 0.15
2.5
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
3.0
tH
Hold Time
CL = 30 pF, RL = 500Ω
3.3
± 0.3
1.0
ns
Figure 6
2.5
± 0.2
1.0
1.8
± 0.15
1.0
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
2.0
tW
Pulse Width
CL = 30 pF, RL = 500Ω
3.3
± 0.3
1.5
ns
Figure 5
2.5
± 0.2
1.5
1.8
± 0.15
4.0
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
4.0
tOSHL
Output to Output Skew
CL = 30 pF, RL = 500Ω
3.3
± 0.3
0.5
ns
tOSLH
(Note 7)
2.5
± 0.2
0.5
1.8
± 0.15
0.75
CL = 15 pF, RL = 2kΩ
1.5
± 0.1
1.5


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