www.ti.com

FEATURES

APPLICATIONS

TL16C2752

SLWS188 – JUNE 2006

1.8-V to 5-V DUAL UART WITH 64-BYTE FIFOS

•

Fully Programmable Serial Interface

Characteristics:

•

Larger FIFOs Reduce CPU Overhead

– 5-, 6-, 7-, or 8-Bit Characters

•

Programmable Auto-RTS and Auto-CTS

– Even-, Odd-, or No-Parity Bit Generation

•

In Auto-CTS Mode, CTS Controls the

and Detection

Transmitter

– 1-, 1 ½-, or 2-Stop Bit Generation

•

In Auto-RTS Mode, RCV FIFO Contents, and

Threshold Control RTS

– Baud Generation (dc to 1 Mbit/s)

•

Serial and Modem Control Outputs Drive a

•

False-Start Bit Detection

RJ11 Cable Directly When Equipment is on

•

Complete Status Reporting Capabilities

the Same Power Drop

•

3-State Output TTL Drive Capabilities for

•

Capable of Running With All Existing

Bidirectional Data Bus and Control Bus

TL16C450 Software

•

Line Break Generation and Detection

•

After Reset, All Registers Are Identical to the

•

Internal Diagnostic Capabilities:

TL16C450 Register Set

– Loopback Controls for Communications

•

Up to 48 MHz Clock Rate for up to 3-Mbps

Link Fault Isolation

(standard 16X sampling) Operation, or up to

– Break, Parity, Overrun, and Framing Error

6-Mbps (optional 8X sampling) Operation

Simulation

•

Fully Prioritized Interrupt System Controls

•

Up to 32 MHz Clock Rate for up to 2-Mbps

•

Modem Control Functions (CTS, RTS, DSR,

(standard 16X sampling) Operation, or up to

DTR, RI, and DCD)

4-Mbps (optional 8X sampling) Operation

•

Available in 44-Pin PLCC (FN) or 32-Pin QFN

(RHB) Packages

•

Up to 24 MHz Clock Rate for up to 1.5-Mbps

(standard 16X sampling) Operation, or up to

•

Each UART's Internal Register Set May Be

3-Mbps (optional 8X sampling) Operation

Written Concurrently to Save Setup Time

•

Multi-Function Output (MF) Allows Users to

•

Up to 16 MHz Clock Rate for up to 1-Mbps

Select Among Several Functions, Saving

(standard 16X sampling) Operation, or up to

Package Pins

2-Mbps (optional 8X sampling) Operation

•

Point-of-Sale Terminals

•

In the TL16C450 Mode, Hold and Shift

Registers Eliminate the Need for Precise

•

Gaming Terminals

Synchronization Between the CPU and Serial

•

Portable Applications

Data

•

Router Control

•

Programmable Baud Rate Generator Allows

•

Cellular Data

Division of Any Input Reference Clock by 1 to

•

Factory Automation

•

Standard Asynchronous Communication Bits

(Start, Stop, and Parity) Added to or Deleted

From the Serial Data Stream

•

5-V, 3.3-V, 2.5-V, and 1.8 V Operation

•

Independent Receiver Clock Input

•

Transmit, Receive, Line Status, and Data Set

Interrupts Independently Controlled

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCT PREVIEW information concerns products in the

Copyright © 2006, Texas Instruments Incorporated

formative or design phase of development. Characteristic data and

other specifications are design goals. Texas Instruments reserves

the right to change or discontinue these products without notice.