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TDA1305T Datenblatt(PDF) 11 Page - NXP Semiconductors |
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TDA1305T Datenblatt(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 1995 Dec 08 11 Philips Semiconductors Preliminary specification Stereo 1fs data input up-sampling filter with bitstream continuous dual DAC (BCC-DAC2) TDA1305T Notes 1. All VDD and VSS pins must be connected externally to the same supply. 2. Vripple = 1% of supply voltage; fripple = 100 Hz. Ripple rejection RR to VDDA is dependent on the value of the external capacitor (CEXT3 in Fig.1) connected to Vref. The value here assumes that CEXT3 =1 µF. 3. Minimum VIL and maximum VIH are peak values to allow for transients. 4. ILImni measured at VI = 0 V; ILImax measured at VI = 5.5 V. 5. Reference levels = 10% and 90%. ANALOG CHARACTERISTICS VDD =VDDA =VDDO =5V; VSS =0V; Tamb =25 °C; unless otherwise specified. Serial input data timing (see Fig.4) fBCK bit-clock input (data input rate) frequency fsys = 384fs − 48fs − MHz fsys = 256fs − 64fs − MHz fWS word select input frequency normal speed 25 44.1 48 kHz double speed 50 88.2 96 kHz tr rise time −− 20 ns tf fall time −− 20 ns tH bit clock time HIGH 55 −− ns tL bit clock time LOW 55 −− ns tsu data set-up time 40 −− ns th data hold time 10 −− ns tsuWS word select set-up time 40 −− ns thWS word select hold time 10 −− ns SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Reference values Vref reference voltage level 2.45 2.5 2.55 V RCONV current-to-voltage conversion resistor 1.6 2.2 2.8 k Ω Analog outputs RES resolution −− 18 bit VFS(rms) full-scale output voltage (pins 23 and 25) (RMS value) 1.425 1.5 1.575 V VOFF output voltage DC offset with respect to reference voltage level Vref −80 −65 −50 mV TCFS full scale temperature coefficient −±100 × 10−6 − SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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