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STP2230SOP
Crossbar Switch
XB1
July 1997
BLOCK,LOGIC, AND TYPICAL APPLICATION DIAGRAMS
SYS_CLK
BMX_CMD[3:0]
MWB_CTRL
MRB_CTRL
A_BUS[15:0]
Memory
Data
Interface
Block
I/O
Data
Interface
Block
C_BUS[3:0]
B_BUS[7:0]
Processor
Data
Interface
Block
PIR_DATA[7:0]
PMR_DATA[7:0]
In previous documentation, the A_BUS, B_BUS, and C_BUS were
referred to as M_BUS, P_BUS, and I_BUS respectively.
X_MIE
X_MIO
X_MPE
X_MPO
X_PM
X_IM
X_PIB
X_PIS
X_IPB
X_IPS
X_IDLE
X_RESET
X_TEST
IMR_DATA[3:0]
IMW_DATA[3:0]
PW_DATA[7:0]
Note:
Chip Boundary
Figure 1. STP2230SOP Block Diagram
A[15:0]
Figure 2. STP2230SOP Logic Diagram
16
MWB_CTRL
MRB_CTRL
SEL[3:0]
4
CLK –
CLK +
Memory Data Bus
C[3:0]
I/O Data Bus
4
B[7:0]
Processor Data Bus
8
STP2230SOP
BMX_CMD [3:0]
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