Datenblatt-Suchmaschine für elektronische Bauteile |
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M41T60 Datenblatt(PDF) 7 Page - STMicroelectronics |
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M41T60 Datenblatt(HTML) 7 Page - STMicroelectronics |
7 / 24 page M41T60 Operation 7/24 Figure 6. Acknowledgement sequence 2.2 READ mode In this mode, the master reads the M41T60 slave after setting the slave address (see Figure 7). Following the WRITE Mode Control Bit (R/W = 0) and the Acknowledge Bit, the word address An is written to the on-chip address pointer. Next the START condition and slave address are repeated, followed by the READ Mode Control Bit (R/W = 1). At this point, the master transmitter becomes the master receiver. The data byte which was addressed will be transmitted and the master receiver will send an Acknowledge Bit to the slave transmitter. The address pointer is only increased on reception of an Acknowledge Bit. The M41T60 slave transmitter will now place the data byte at address An+1 on the bus. The master receiver reads and acknowledges the new byte and the address pointer is increased to An+2. This cycle of reading consecutive addresses will continue until the master receiver sends a STOP condition to the slave transmitter. The system-to-user transfer of clock data will be halted whenever the address being read is a clock address (0h to 6h). The update will resume due to a Stop Condition or when the pointer increments to any non-clock address (7h). An alternate READ Mode may also be implemented, whereby the master reads the M41T60 slave without first writing to the (volatile) address pointer. The first address that is read is the last one stored in the pointer (see Figure 9 on page 9). |
Ähnliche Teilenummer - M41T60_05 |
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Ähnliche Beschreibung - M41T60_05 |
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