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LF400ACH Datenblatt(PDF) 9 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Teilenummer LF400ACH
Bauteilbeschribung  Fast-Settling JFET-Input Operational Amplifier
Download  12 Pages
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Hersteller  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LF400ACH Datenblatt(HTML) 9 Page - National Semiconductor (TI)

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Typical Performance Characteristics (Continued)
CommonMode Voltage Transfer Characteristic
TLH9414 – 19
TLH9414 – 20
Application Hints
The LF400 is a high-speed low input bias current Bi-FET
operational amplifier capable of settling to 001% of a 10V
output swing in less than 400 ns The rugged JFET inputs
allow differential input voltages as high as 32V without a
large increase in input current However the inputs should
never be driven to voltages lower than the negative supply
as this can result in input currents large enough to damage
the device To prevent this from occurring when power is
first applied always turn the positive and negative power
supplies on simultaneously or turn the negative supply on
first
Exceeding the common-mode input range will not damage
the device as long as the Absolute Maximum Ratings are
not violated but it will result in a high output voltage Latch-
ing will not occur however and when the offending signal is
removed the LF400 will recover quickly
The nominal power supply voltage is g15V but the LF400
will operate satisfactorily from g10V to g16V The LF400 is
functional down to g5V but performance will be degraded
(See Typical Performance curves)
Settling Time Considerations
The settling performance of any high-speed operational am-
plifier is highly dependent on the external components and
circuit board layout Capacitance between the amplifier
summing junction and ground affects the closed-loop trans-
fer function and should be minimized The compensation
capacitor CC between the output and the inverting input
should be carefully chosen to counteract the effect of the
input capacitance Since input capacitance is made up of
several stray capacitances that are difficult to predict the
compensation capacitor will generally have to be deter-
mined empirically for best settling time A good starting
point is around 10 pF for AV eb1
Settling time may be verified using a circuit similar to the
one in
Figure 1 The LF400 is connected for inverting opera-
tion and the output voltage is summed with the input volt-
age step When the LF400’s output voltage is equal to the
input voltage the voltage on the gate of Q1 will be zero Any
voltage appearing at this point will represent an error The
FET source follower output is observed on an oscilloscope
and the settling time is equal to the time required for the
error signal displayed on the oscilloscope to decay to less
than one-half the necessary accuracy (see oscilloscope
photos of ‘‘Settling TimePositive Output Swing’’ and ‘‘Set-
tling TimeNegative Output Swing’’) For a 10V input sig-
nal settling time to 001% (1 mV) will occur when the dis-
played error is less than
mV Since settling time is strong-
ly dependent on slew rate settling will be faster for smaller
signal swings The LF400’s inverting slew rate is faster than
its non-inverting slew rate so settling will be faster for in-
verting applications as well
It is important to note that the oscilloscope input amplifier
will be overdriven during a settling time measurement so
the oscilloscope must be capable of recovering from over-
drive very quickly Very few oscilloscopes are suitable for
this sort of measurement The signal generator used for set-
9


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