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STAC9767XXTAEYYX Datenblatt(PDF) 2 Page - Integrated Device Technology |
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STAC9767XXTAEYYX Datenblatt(HTML) 2 Page - Integrated Device Technology |
2 / 97 page STAC9766/9767 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING PC AUDIO IDT™ 2 STAC9766/9767 V 7.4 12/06 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING Table of Contents 1. PRODUCT BRIEF ...................................................................................................................... 6 1.1. Features (Revision CC1 and beyond) ............................................................................................... 6 1.2. Description ........................................................................................................................................ 6 1.3. STAC9766/9767 Block Diagram ........................................................................................................ 8 1.4. Key Specifications ............................................................................................................................. 8 1.5. Related Materials .............................................................................................................................. 8 1.6. Additional Support ............................................................................................................................. 8 2. CHARACTERISTICS AND SPECIFICATIONS .........................................................................9 2.1. Electrical Specifications ..................................................................................................................... 9 2.2. AC Timing Characteristics ............................................................................................................... 13 3. TYPICAL CONNECTION DIAGRAM .......................................................................................17 3.1. Split Independent Power Supply Operation .................................................................................... 18 4. CONTROLLER, CODEC AND AC-LINK .................................................................................20 4.1. AC-link Physical interface ................................................................................................................ 20 4.2. Controller to Single CODEC ............................................................................................................ 20 4.3. Controller to Multiple CODECs ........................................................................................................ 22 4.4. Clocking for Multiple CODEC Implementations ............................................................................... 23 4.5. AC-link Power Management ............................................................................................................ 24 5. AC-LINK DIGITAL INTERFACE ..............................................................................................27 5.1. Overview ......................................................................................................................................... 27 5.2. AC-link Serial Interface Protocol ...................................................................................................... 28 5.3. AC-link Output Frame (SDATA_OUT) ............................................................................................. 31 5.4. AC-link Input Frame (SDATA_IN) .................................................................................................... 34 5.5. AC-link Interoperability Requirements and Recommendations ....................................................... 38 5.6. Slot Assignments for Audio ............................................................................................................. 39 6. STAC9766/9767 MIXER ..........................................................................................................41 6.1. Mixer Description ............................................................................................................................. 41 6.2. Mixer Functional Diagrams .............................................................................................................. 42 6.3. Mixer Analog Input ......................................................................................................................... 43 6.4. Mixer Analog Output ....................................................................................................................... 43 7. SPDIF AND PC BEEP .............................................................................................................44 7.1. SPDIF Digital Mux ...........................................................................................................................44 7.2. PC Beep Implementation ................................................................................................................ 44 8. PROGRAMMING REGISTERS ...............................................................................................46 8.1. Register Descriptions ...................................................................................................................... 47 8.2. General Purpose Input & Outputs ................................................................................................... 65 8.3. Extended CODEC Registers Page Structure Definition .................................................................. 68 8.4. STAC9766/9767 Paging Registers ................................................................................................. 69 8.5. Vendor ID1 and ID2 (Index 7Ch and 7Eh) ...................................................................................... 79 9. LOW POWER MODES ...........................................................................................................81 10. MULTIPLE CODEC SUPPORT ............................................................................................83 10.1. Primary/Secondary CODEC Selection .......................................................................................... 83 10.2. Secondary CODEC Register Access Definitions .......................................................................... 84 11. TESTABILITY ........................................................................................................................85 11.1. ATE Test Mode ............................................................................................................................. 85 12. ORDERING INFORMATION ..................................................................................................86 12.1. STAC9766/9767 Family Options and Part Order Numbers ...........................................................86 13. PIN DESCRIPTION ................................................................................................................87 13.1. Digital I/O ...................................................................................................................................... 88 13.2. Filter/References .......................................................................................................................... 88 13.3. Analog I/O .................................................................................................................................... 89 13.4. Power and Ground Signals .......................................................................................................... 90 |
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