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LB11697V Datenblatt(PDF) 11 Page - Sanyo Semicon Device |
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LB11697V Datenblatt(HTML) 11 Page - Sanyo Semicon Device |
11 / 14 page No.8412-11/14 LB11697V LB11697V Functional Description 1. Output Drive Circuit The LB11697V adopts direct PWM drive to minimize power loss in the outputs. The output transistors are always saturated when on, and the motor drive power is adjusted by changing the on duty of the output. The output PWM switching is performed on the UH, VH, and WH outputs. The output PWM switching is performed using the UH, VH, and WH outputs, which are external low side transistor drive outputs. Since the reverse recovery time for the diodes connected to the non-PWM side outputs can be a problem, care is required in selecting these diodes. (If diodes with a short reverse recovery time are not used, through currents will flow at the instant the PWM side transistors are turned on.) 2. Current Limiter Circuit The current limiter circuit limits the output current peak value to a level determined by the equation I = VFR/Rf (VRF = 0.25 V typical, Rf: current detection resistor). This circuit suppresses the output current by reducing the output on duty. High-precision detection can be implemented by connecting the lines from the RF and RFGND pins close to the two terminal of the current detection resistor Rf. The current limiter circuit includes an internal filter circuit to prevent incorrect current limiter circuit operation due to detecting the output diode reverse recovery current due to PWM operation. Although there should be no problems with the internal filter circuit in normal applications, applications should add an external filter circuit (such as an RC low-pass filter) if incorrect operation occurs (if the diode reverse recovery current flows for longer than 1 µs). 3. Power Saving Circuit This IC goes to a low-power mode (power saving state) when set to the stop state with the S/S pin. In the power saving state, the bias currents in most of the circuits are cut off. However, the 5 V regulator output (VREG) is still provided in the power saving state. If it is also necessary to cut the Hall device bias current, this function can be provided by an application that, for example, connects the Hall devices to 5 V through PNP transistors. 4. Notes on the PWM Frequency The PWM frequency is determined by the capacitor C (F) connected to the PWM pin. fPWM ≈ 1/(22500 × C) If a 2000 pF capacitor is used, the circuit will oscillate at about 22 kHz. If the PWM frequency is too low, switching noise will be audible from the motor, and if it is too high, the output power loss will increase. Thus a frequency in the range 15 to 50 kHz must be used. The capacitor's ground terminal must be placed as close as possible to the IC’s ground pin to minimize the influence of output noise and other noise sources. 5. Control Methods The output duty can be controlled by either of the following methods • Control based on comparing the TOC pin voltage to the PWM oscillator waveform The low side output transistor duty is determined according to the result of comparing the TOC pin voltage to the PWM oscillator waveform. When the TOC pin voltage is 1.4 V or lower, the duty will be 0%, and when it is 3.0 V or higher, the duty will be 100%. Since the TOC pin is the output of the control amplifier (CTL), a control voltage cannot be directly input to the TOC pin. Normally, the control amplifier is used as a full feedback amplifier (with the EI- pin connected to the TOC pin) and a DC voltage is input to the EI+ pin (the EI+ pin voltage will become equal to the TOC pin voltage). When the EI+ pin voltage becomes higher, the output duty increases. Since the motor will be driven when the EI+ pin is in the open state, a pull-down resistor must be connected to the EI+ pin if the motor should not operate when EI+ is open. When TOC pin voltage control is used, a low-level input must be applied to the PWMIN pin or that pin connected to ground. To the RF pin Current detection resistor To the VREG pin To the S/S pin Hall device |
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