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SM320C6201BGLPS20 Datenblatt(PDF) 1 Page - Texas Instruments |
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SM320C6201BGLPS20 Datenblatt(HTML) 1 Page - Texas Instruments |
1 / 64 page SM320C6201B, SMJ320C6201B DIGITAL SIGNAL PROCESSOR SGUS031B – APRIL 2000 – REVISED AUGUST 2001 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 D Highest Performance Fixed-Point Digital Signal Processor (DSP) SM/SMJ320C6201B – 5-, 6.7-ns Instruction Cycle Time – 150 and 200-MHz Clock Rate – Eight 32-Bit Instructions/Cycle – 1200 and 1600 MIPS D VelociTI Advanced Very Long Instruction Word (VLIW) C62x CPU Core – Eight Independent Functional Units: – Six ALUs (32-/40-Bit) – Two 16-Bit Multipliers (32-Bit Results) – Load-Store Architecture With 32 32-Bit General-Purpose Registers – Instruction Packing Reduces Code Size – All Instructions Conditional D Instruction Set Features – Byte-Addressable (8-, 16-, 32-Bit Data) – 32-Bit Address Range – 8-Bit Overflow Protection – Saturation – Bit-Field Extract, Set, Clear – Bit-Counting – Normalization D 1M-Bit On-Chip SRAM – 512K-Bit Internal Program/Cache (16K 32-Bit Instructions) – 512K-Bit Dual-Access Internal Data (64K Bytes) Organized as Two Blocks for Improved Concurrency D 32-Bit External Memory Interface (EMIF) – Glueless Interface to Synchronous Memories: SDRAM and SBSRAM – Glueless Interface to Asynchronous Memories: SRAM and EPROM D Four-Channel Bootloading Direct-Memory-Access (DMA) Controller with an Auxiliary Channel D 16-Bit Host-Port Interface (HPI) – Access to Entire Memory Map D Two Multichannel Buffered Serial Ports (McBSPs) – Direct Interface to T1/E1, MVIP, SCSA Framers – ST-Bus-Switching Compatible – Up to 256 Channels Each – AC97-Compatible – Serial Peripheral Interface (SPI) Compatible (Motorola ) D Two 32-Bit General-Purpose Timers D Flexible Phase-Locked Loop (PLL) Clock Generator D IEEE-1149.1 (JTAG†) Boundary-Scan Compatible D 429-Pin BGA Package (GLP Suffix) D CMOS Technology – 0.18- µm/5-Level Metal Process D 3.3-V I/Os, 1.8-V Internal Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. C62x and VelociTI are trademarks of Texas Instruments Incorporated. Motorola is a trademark of Motorola, Inc. † IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture. Copyright 2001, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. GLP 429-PIN BALL GRID ARRAY (BGA) PACKAGE (BOTTOM VIEW) 20 21 19 18 16 15 17 13 11 10 12 14 W Y AA V T U P M N R 8 7 6 4 5 L J K G E F H 3 2 D B C A 1 9 On products compliant to MILPRF38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. |
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