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74AHCT86D Datenblatt(PDF) 3 Page - NXP Semiconductors |
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74AHCT86D Datenblatt(HTML) 3 Page - NXP Semiconductors |
3 / 14 page 74AHC_AHCT86_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 15 November 2007 3 of 14 NXP Semiconductors 74AHC86; 74AHCT86 Quad 2-input EXCLUSIVE-OR gate 5. Pinning information 5.1 Pinning 5.2 Pin description 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level. (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO14, TSSOP14 Fig 5. Pin configuration DHVQFN14 74AHC86 74AHCT86 1A VCC 1B 4B 1Y 4A 2A 4Y 2B 3B 2Y 3A GND 3Y 001aah083 1 2 3 4 5 6 7 8 10 9 12 11 14 13 001aad105 86 Transparent top view 2Y 3A 2B 3B 2A 4Y 1Y 4A 4B 1B GND(1) 6 9 5 10 4 11 3 12 2 13 terminal 1 index area Table 2. Pin description Symbol Pin Description 1A to 4A 1, 4, 9, 12 data input 1B to 4B 2, 5, 10, 13 data input 1Y to 4Y 3, 6, 8, 11 data outputs GND 7 ground (0 V) VCC 14 supply voltage Table 3. Function table[1] Input nA Input nB Output nY LLL LH H HL H HHL |
Ähnliche Teilenummer - 74AHCT86D |
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Ähnliche Beschreibung - 74AHCT86D |
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