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74LV138D Datenblatt(PDF) 4 Page - NXP Semiconductors |
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74LV138D Datenblatt(HTML) 4 Page - NXP Semiconductors |
4 / 17 page 74LV138_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 15 November 2007 4 of 17 NXP Semiconductors 74LV138 3-to-8 line decoder/demultiplexer; inverting 5.2 Pin description 6. Functional description 7. Limiting values Table 2. Pin description Symbol Pin Description A0 1 address input A1 2 address input A2 3 address input E1 4 enable input (active LOW) E2 5 enable input (active LOW) E3 6 enable input (active HIGH) GND 8 ground (0 V) Y0 to Y7 15, 14, 13, 12, 11, 10, 9, 7 output VCC 16 supply voltage Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care Input Output E1 E2 E3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 HX X X X X H HHHHHHH X H X X X X H HHHHHHH X X L X X X HHHHHHHH L L HL L L L H HHHHHH L L HHL L H L HHHHHH L L HL HL HHL HHHHH LLH H H LH H H LH H H H L L HL L HHHHHL HHH L L HHL HHHHHHL HH L L HL HHHHHHHHL H L L HHHHHHHHHHHL Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7.0 V IIK input clamping current VI < −0.5 V or VI >VCC + 0.5 V [1] - ±20 mA IOK output clamping current VO < −0.5 V or VO >VCC + 0.5 V [1] - ±50 mA IO output current VO = −0.5 V to (VCC + 0.5 V) - ±25 mA ICC supply current - 50 mA IGND ground current −50 - mA Tstg storage temperature −65 +150 °C |
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