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SN74ACT564DBRG4 Datenblatt(PDF) 1 Page - Texas Instruments |
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SN74ACT564DBRG4 Datenblatt(HTML) 1 Page - Texas Instruments |
1 / 15 page SN54ACT564, SN74ACT564 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS549B – NOVEMBER 1995 – REVISED NOVEMBER 2002 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 8.5 ns at 5 V D Inputs Are TTL-Voltage Compatible D 3-State Inverted Outputs Drive Bus Lines Directly D Flow-Through Architecture to Optimize PCB Layout D Full Parallel Access for Loading description/ordering information The ’ACT564 devices are octal D-type edge-triggered flip-flops that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the complements of the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube SN74ACT564N SN74ACT564N SOIC DW Tube SN74ACT564DW ACT564 40 °Cto85°C SOIC – DW Tape and reel SN74ACT564DWR ACT564 –40 °C to 85°C SOP – NS Tape and reel SN74ACT564NSR ACT564 SSOP – DB Tape and reel SN74ACT564DBR AD564 TSSOP – PW Tape and reel SN74ACT564PWR AD564 CDIP – J Tube SNJ54ACT564J SNJ54ACT564J –55 °C to 125°C CFP – W Tube SNJ54ACT564W SNJ54ACT564W LCCC – FK Tube SNJ54ACT564FK SNJ54ACT564FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE 1D 2D 3D 4D 5D 6D 7D 8D GND VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK SN54ACT564 ...J OR W PACKAGE SN74ACT564 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) 3 2 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 2Q 3Q 4Q 5Q 6Q 3D 4D 5D 6D 7D SN54ACT564 . . . FK PACKAGE (TOP VIEW) UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2002, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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