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ST10F280-JT3 Datenblatt(PDF) 5 Page - STMicroelectronics

Teilenummer ST10F280-JT3
Bauteilbeschribung  16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F280-JT3 Datenblatt(HTML) 5 Page - STMicroelectronics

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17.3 -
SOFTWARE RESET ..................................................................................................
131
17.4 -
WATCHDOG TIMER RESET .....................................................................................
131
17.5 -
RSTOUT PIN AND BIDIRECTIONAL RESET ............................................................
131
17.6 -
RESET CIRCUITRY ...................................................................................................
132
18 -
POWER REDUCTION MODES .................................................................................
135
18.1 -
IDLE MODE ................................................................................................................135
18.2 -
POWER DOWN MODE ..............................................................................................
135
18.2.1 -
Protected Power Down Mode .....................................................................................
136
18.2.2 -
Interruptable Power Down Mode ................................................................................
136
19 -
SPECIAL FUNCTION REGISTER OVERVIEW .........................................................
139
19.1 -
IDENTIFICATION REGISTERS .................................................................................
148
19.2 -
SYSTEM CONFIGURATION REGISTERS ................................................................
149
20 -
ELECTRICAL CHARACTERISTICS .........................................................................
155
20.1 -
ABSOLUTE MAXIMUM RATINGS .............................................................................
155
20.2 -
PARAMETER INTERPRETATION .............................................................................
155
20.3 -
DC CHARACTERISTICS ...........................................................................................
155
20.3.1 -
A/D Converter Characteristics ....................................................................................
158
20.3.2 -
Conversion Timing Control
.......................................................................................
159
20.4 -
AC CHARACTERISTICS ............................................................................................
160
20.4.1 -
Test Waveforms
.......................................................................................................160
20.4.2 -
Definition of Internal Timing ........................................................................................
160
20.4.3 -
Clock Generation Modes ............................................................................................
161
20.4.4 -
Prescaler Operation ....................................................................................................162
20.4.5 -
Direct Drive .................................................................................................................
162
20.4.6 -
Oscillator Watchdog (OWD) .......................................................................................
162
20.4.7 -
Phase Locked Loop ....................................................................................................
162
20.4.8 -
External Clock Drive XTAL1 .......................................................................................
163
20.4.9 -
Memory Cycle Variables .............................................................................................
164
20.4.10 -
Multiplexed Bus ..........................................................................................................
165
20.4.11 -
Demultiplexed Bus ......................................................................................................
171
20.4.12 -
CLKOUT and READY .................................................................................................
177
20.4.13 -
External Bus Arbitration ..............................................................................................179
20.4.14 -
High-Speed Synchronous Serial Interface (SSC) Timing ...........................................
181
20.4.14.1
Master Mode................................................................................................................
181
20.4.14.2
Slave mode..................................................................................................................
182
21 -
PACKAGE MECHANICAL DATA
...........................................................................
183
22 -
ORDERING INFORMATION ......................................................................................
184


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