Datenblatt-Suchmaschine für elektronische Bauteile |
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M74HCT373B1R Datenblatt(PDF) 1 Page - STMicroelectronics |
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M74HCT373B1R Datenblatt(HTML) 1 Page - STMicroelectronics |
1 / 11 page 1/11 August 2001 s HIGH SPEED: tPD = 19ns (TYP.) at VCC = 4.5V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 373 DESCRIPTION The M74HCT373 is an high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with sub-micron silicon gate C2MOS technology. This 8-BIT D-Type latches is controlled by a latch enable input (LE) and output enable input (OE). While the LE input is held at a high level, the Q outputs will follow the data input. When the LE is taken low, the Q outputs will be latched at the logic level of D input data. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and when OE is in high level the outputs will be in a high impedance state. The 3-State output configuration and the wide choice of outline make bus organized system simple. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HCT373 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP M74HCT373B1R SOP M74HCT373M1R M74HCT373RM13TR TSSOP M74HCT373TTR TSSOP DIP SOP |
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Ähnliche Beschreibung - M74HCT373B1R |
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