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AD5398ABCBZ-REEL Datenblatt(PDF) 3 Page - Analog Devices |
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AD5398ABCBZ-REEL Datenblatt(HTML) 3 Page - Analog Devices |
3 / 16 page AD5398A Rev. 0 | Page 3 of 16 SPECIFICATIONS VDD = 2.7 V to 5.5 V, AGND = DGND = 0 V, load resistance (RL) = 25 Ω connected to VDD; all specifications TMIN to TMAX, unless otherwise noted. Table 1. B Version1 Parameter Min Typ Max Unit Test Conditions/Comments DC PERFORMANCE VDD = 3.6 V to 4.5 V; device operates over 2.7 V to 5.5 V with reduced performance Resolution 10 Bits 117 μA/LSB Relative Accuracy2 ±1.5 ±4 LSB Differential Nonlinearity2, 3 ±1 LSB Guaranteed monotonic over all codes Zero Code Error2, 4 0 0.5 1 mA All 0s loaded to DAC Offset Error @ Code 162 0.5 mA Gain Error2 ±0.6 % of FSR at 25°C Offset Error Drift2, 4, 5 10 μA/°C Gain Error Drift2, 5 ±0.2 ±0.5 LSB/°C OUTPUT CHARACTERISTICS Minimum Sink Current4 3 mA Maximum Sink Current 120 mA VDD = 3.6 V to 4.5 V; device operates over 2.7 V to 5.5 V; specified maximum sink current may not be achieved Output Current During PD5 80 nA PD = 1 Output Compliance5 0.6 VDD V Output voltage range over which maximum 120 mA sink current is available Output Compliance5 0.48 VDD V Output voltage range over which 90 mA sink current is available Power-Up Time5 20 μs To 10% of FS, coming out of power-down mode; VDD = 5 V LOGIC INPUT (PD)5 Input Current ±1 μA Input Low Voltage, VINL 0.54 V VDD = 2.7 V to 5.5 V Input High Voltage, VINH 1.26 V VDD = 2.7 V to 5.5 V Pin Capacitance 3 pF LOGIC INPUTS (SCL, SDA)5 Input Low Voltage, VINL −0.3 +0.54 V VDD = 2.7 V to 3.6 V Input High Voltage, VINH 1.26 VDD + 0.3 V VDD = 2.7 V to 3.6 V Input Low Voltage, VINL −0.3 +0.54 V VDD = 3.6 V to 5.5 V Input High Voltage, VINH 1.4 VDD + 0.3 V VDD = 3.6 V to 5.5 V Input Leakage Current, IIN ±1 μA VIN = 0 V to VDD Input Hysteresis, VHYST 0.05 VDD V Digital Input Capacitance, CIN 6 pF Glitch Rejection6 50 ns Pulse width of spike suppressed POWER REQUIREMENTS VDD 2.7 5.5 V IDD (Normal Mode) 0.5 1 mA IDD specification is valid for all DAC codes; VIH = VDD, VIL = GND, VDD = 5.5 V IDD (Power-Down Mode)7 0.5 μA VIH = VDD, VIL = GND, VDD = 3 V 1 Temperature range for the B version is −30°C to +85°C. 2 See the Terminology section. 3 Linearity is tested using a reduced code range: Code 32 to Code 1023. 4 To achieve near zero output current, use the power-down feature. 5 Guaranteed by design and characterization; not production tested. PD is active high. SDA and SCL pull-up resistors are tied to 1.8 V. 6 Input filtering on both the SCL and SDA inputs suppresses noise spikes that are less than 50 ns. 7 PD is active high. When PD is taken high, the AD5389A enters power-down mode. |
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Ähnliche Beschreibung - AD5398ABCBZ-REEL |
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