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TS68HC901 Datenblatt(PDF) 10 Page - STMicroelectronics |
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TS68HC901 Datenblatt(HTML) 10 Page - STMicroelectronics |
10 / 42 page V7 V6 V5 V4 IV3 IV2 IV1 IV0 V7-V4 The four most significant bits are copied from the register IV3-IV0 These bits are supplied by the CMFP. They are the binary channel number of the highest priority channel that is requesting interrupt service. Figure 6 : 7 VECTOR REGISTER 0 VR (17h) V7 V6 V5 V4 S 0* 0* 0* Wr iting 0 : CLEAR ED Wr iting 1 : SET C LEAR ED on RESET V7-V4 The upper four bits of the vector register are written by the user. These bits become the most significant four bits of the interrupt vector number. S In-Service Register Enable. When the S bit is zero, the CMFP is in the automatic end-of-in- terrupt mode and the In-Service register bits are forced low. When the S bit is a one, the CMFP is in the software end-of-interrupt mode and the In-Service register bits are enabled. * Unused bits, read as zero. Figure 7 : TS68HC901 TS68HC901 TS68HC901 Figure 8 : Daisy Chaining ® TS68HC901 10/42 |
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