Datenblatt-Suchmaschine für elektronische Bauteile |
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SM3 Datenblatt(PDF) 3 Page - Connor-Winfield Corporation |
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SM3 Datenblatt(HTML) 3 Page - Connor-Winfield Corporation |
3 / 36 page Data Sheet #: TM052 Page 3 of 36 Rev: 03 Date: 11/07/08 © Copyright 2008 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Specifications for Ultra Miniature Stratum 3 Table 1 Parameter Specification Voltage 3.3V ± 5% Power < 500 mW Operating Temp Range 0° - 70°C Reference Frequency 1, 2, 3, 4 8 kHz - 77.76 MHz (Auto Detected) CMOS Output Frequency #1 12.96 MHz - 77.76 MHz M/S Output 8 kHz BITS_Clk 1.544/2.048 MHz (Selectable) Master/Slave Input Reference 8 kHz - 77.76 MHz Input Reference Pulse Width 10 ns Min @ 8 kHz, 5 ns Min @ >8 kHz Reference Qualification Time 10 sec. Input Capacitance (LVCMOS) 10 pF Output Drive Levels (LVCMOS) Source Current: 7 mA, Sink Current: 10 mA Free Run Accuracy 4.6 ppm Hold Over Accuracy 0.37 ppm Dimensions 1.45 x 1.0 x 0.25 inches (36.83 x 25.4 x 6.35 mm) Pin Description Table 2 Pin # I/O Pin Name Pin Description 1 O LOS Alarm output - Loss of Active Reference Signal 2 O LOL Alarm Output - Loss of Lock 3 I M/S REF Master/Slave reference input – 8 kHz to 77.76 MHz auto detected 4 I REF1 Reference Input 1 – 8 kHz to 77.76 MHz auto detected 5 I REF2 Reference Input 2 – 8 kHz to 77.76 MHz auto detected 6 I REF3 Reference Input 3 – 8 kHz to 77.76 MHz auto detected 7 I REF4 Reference Input 4 – 8 kHz to 77.76 MHz auto detected 8 TDI JTAG TDI pin 9 TMS JTAG TMS pin 10 TRST JTAG TRST pin 11 O BITS_CLK 1.544 or 2.048 MHz output selected by pin 16 12 O M/S_OUT Master/Slave 8 kHz output 13 O OUTPUT1 Synchronous Primary Output 14 I VPP Positive Programming Supply Pin. During normal operation it is recommended to float this pin. 15 I VPN Negative Programming Supply Pin. During normal operation it is recommended to float this pin. 16 I T1/E1 BITS_CLK select input – 1=1.544 MHz, 0=2.048 MHz 17 O HOLD_GOOD Holdover Good Output Flag – 1=Holdover Available 18 TDO JTAG TDO pin 19 TCK JTAG TCK pin 20 GND Module Ground 21 I SPI_CLK SPI Port Clock input 22 I SPI_IN SPI Port Data input 23 VCC 3.3 Vdc VCC Supply Input 24 I SPI_ENBL SPI Port Enable input – Active Low 25 I RESET Module Reset – Active Low, 10 ms Hold time 26 O SPI_OUT SPI Port Data Output 27 O SPI_INT SPI Port Interrupt Output – Active Low 28 I MASTER SELECT Master/Slave select input – 1=Master, 0=Slave |
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