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SN74ABT8652DW Datenblatt(PDF) 2 Page - Texas Instruments |
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SN74ABT8652DW Datenblatt(HTML) 2 Page - Texas Instruments |
2 / 25 page SN54ABT8652, SN74ABT8652 SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS AND REGISTERS SCBS122F – AUGUST 1992 – REVISED DECEMBER 1996 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) Data flow in each direction is controlled by clock (CLKAB and CLKBA), select (SAB and SBA), and output-enable (OEAB and OEBA) inputs. For A-to-B data flow, data on the A bus is clocked into the associated registers on the low-to-high transition of CLKAB. When SAB is low, real-time A data is selected for presentation to the B bus (transparent mode). When SAB is high, stored A data is selected for presentation to the B bus (registered mode). When OEAB is high, the B outputs are active. When OEAB is low, the B outputs are in the high-impedance state. Control for B-to-A data flow is similar to that for A-to-B data flow but uses CLKBA, SBA, and OEBA inputs. Since the OEBA input is active low, the A outputs are active when OEBA is low and are in the high-impedance state when OEBA is high. Figure 1 shows the four fundamental bus-management functions that can be performed with the ’ABT8652. In the test mode, the normal operation of the SCOPE ™ bus transceivers and registers is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary-scan test operations as described in IEEE Standard 1149.1-1990. Four dedicated test pins control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54ABT8652 is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74ABT8652 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE INPUTS DATA I/O OPERATION OR FUNCTION OEAB OEBA CLKAB CLKBA SAB SBA A1–A8 B1–B8 OPERATION OR FUNCTION L H X X X X Input disabled Input disabled Isolation L H ↑↑ X X Input Input Store A and B data X H ↑ L X X Input Unspecified† Store A, hold B H H ↑↑ X‡ X Input Output Store A in both registers L X L ↑ X X Unspecified† Input Hold A, store B L L ↑↑ XX‡ Output Input Store B in both registers L L X X X L Output Input Real-time B data to A bus L L X X X H Output Input Stored B data to A bus H H X X L X Input Output Real-time A data to B bus H H X X H X Input Output Stored A data to B bus H L L L H H Output Output Stored A data to B bus and stored B data to A bus † The data-output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data-input functions are always enabled; i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs. ‡ Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered in order to load both registers. |
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