Datenblatt-Suchmaschine für elektronische Bauteile |
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UC1875N Datenblatt(PDF) 2 Page - Texas Instruments |
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UC1875N Datenblatt(HTML) 2 Page - Texas Instruments |
2 / 19 page 2 UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 Dil-20 (Top View) J or N Package ABSOLUTE MAXIMUM RATINGS Supply Voltage (VC, VIN) ..........................20V Output Current, Source or Sink DC ......................................... 0.5A Pulse (0.5 µs) ..................................3A Analog I/0s (Pins 1, 2, 3, 4, 5, 6, 7, 15, 16, 17, 18, 19) .... –0.3 to 5.3V Storage Temperature Range ............. –65°C to +150°C Junction Temperature ................... –55°C to +150°C Lead Temperature (Soldering, 10 sec.) ............ +300°C Note: Pin references are to 20 pin packages. All voltages are with respect to ground. Currents are positive into, neg- ative out of, device terminals. Consult Unitrode databook for information regarding thermal specifica- tions and limitations of packages. SOIC-28, (Top View) DWP Package CONNECTION DIAGRAMS 4 25 24 23 OUTA 2 31 28 22 21 5 6 7 8 9 12 14 13 15 16 N/C N/C OUTC OUTD N/C DELAYSET C-D SS CS+ EA+ DELAYSET A-B FREQSET CLOCKSYNC SLOPE RAMP E/A- N/C N/C N/C GND 10 11 17 18 20 19 27 26 OUTB PWRGND VIN N/C E/A OUT VREF N/C VC Additional features include an error amplifier with band- width in excess of 7MHz, a 5V reference, provisions for soft-starting, and flexible ramp generation and slope com- pensation circuitry. These devices are available in 20-pin DIP, 28-pin “bat-wing” SOIC and 28 lead power PLCC plastic pack- ages for operation over both 0°C to 70°C and –25°C to +85°C temperature ranges; and in hermetically sealed cerdip, surface mount, and ceramic leadless chip carrier packages for –55°C to +125°C operation. Device UVLO Turn-On UVLO Turn-Off Delay Set UC1875 10.75 9.25V Yes UC1876 15.25V 9.25V Yes UC1877 10.75V 9.25V No UC1878 15.25V 9.25V No DESCRIPTION (cont.) CLCC-28 (Top View) L Package |
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Ähnliche Beschreibung - UC1875N |
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